搜索资源列表
ActelFPGA_RAM_an
- FPGA下开发RAM的手册，与FPGA自带的说明不同-FPGA development manual of RAM, comes with instructions and FPGA
jpeg_hardware.tar
- 用FPGA实现的JPEG压缩器，可以直接使用，内含完整文档说明-This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second at the maximum resolution 352x288 (on XC2V
verilog--sram
- ram的fpga应用，用verilog语言实现，适用于cyclone 2系列-ram the fpga application verilog language applicable to cyclone 2
emif
- EMIF字符型设备驱动，实现了dm368与FPGA之间的通信，把FPGA当着dm368的一个ram往里面写数据和向外发数据。-The driver of EMIF .
lab5_files
- 关于FPGA ROM与RAM的分析应用及源码-Applications and source code analysis of the FPGA ROM and RAM
635022219123437500
- 基于FPGA的CAM设计，CAM设计的方案和代码。-Using Block RAM for High Performance Read/Write CAMs
arm_fpga.tar
- 实现TQ2440与FPGA的通信功能，将FPGA当作ARM的一个外设，通信方式为静态RAM方式。在代码中，我实现了向FPGA读写数据的功能，已经做过测试。没问题-make the TQ2440 board commuciate with the FPGA board.
epcs35f
- 该程序实现了在ALTERA FPGA上搭建NIOS系统，实现程序在EPCS4上保存，在内部RAM 上运行-The program to build on in the ALTERA FPGA NIOS system, program EPCS4 saved on the internal RAM to run
16bit_ram
- 利用vhdl语言在fpga实现十六位的ram 使用非常方便-Using vhdl fpga implementation sixteen languages in the ram is very convenient to use
ramipcore
- 使用vhdl 语言在fpga环境下实现ram ip core-Environment in fpga vhdl language used to achieve ram ip core
90166ram_16bit
- 基于FPGA的片没ram的读写功能代码，能够写入和读出16bit的数据，适合初学者学习和模仿使用-FPGA-based tablets did not ram read and write function code can be written and read out the 16bit data, suitable for beginners to learn and imitate Use
33017ram(1)
- 基于FPGA的片没ram的读写功能代码，能够写入和读出16bit的数据，适合初学者学习和模仿使用-FPGA-based tablets did not ram read and write function code can be written and read out the 16bit data, suitable for beginners to learn and imitate Use
cos_value
- 用于生成FPGA中RAM所需要的初始化文件dds.mif,此文件生成的是余弦波形。-This document of .m can generate document of .mif to provide data for RAM of FPGA.
emifa_ram
- FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序-FPGA and DSP EMIF communication
fpgawritetoram
- fpga向RAM中写数据，数据宽度32位，利用VHDL编写。-FPGA write data to ram in 32bit data bus,write in VHDL.
Latch_sram
- FPGA内部集成RAM和锁存器模块设计，欢迎大家来验证-FPGA internal RAM and latches integrated module design, welcome to verify
DAC900
- 自己写的，FPGA为Cyclone ep1c12q240c8，dac芯片是DAC900。fpga内置ram存储波形数据，发送给dac900产生波形。用VerilogHDL编写。-Write your own, FPGA as Cyclone ep1c12q240c8, dac chip is DAC900. Built-ram fpga store waveform data, waveform generated is sent to dac900. Written VerilogHDL.
IPRAM
- FPGA内置RAM,调用tools里面的IP核，生成一个双口的RAM，用来存储数据。然后可以用SignalTAP II查看波形或者数据。-FPGA built-in RAM, which is called IP core tools to generate a dual port RAM, used to store data. You can then view the waveform or use SignalTAP II data.
9288Test3
- AD9288 100MhzAD转换芯片的控制代码，用Verilog语言实现。采集数据存储于FPGA内置RAM中。-Conversion chip AD9288 100MhzAD control code, using Verilog language. FPGA collected data is stored in the built-in RAM.
ram_test
- ISE中双端口不同位宽ram的数据存储，包括testbench-veirlog ram FPGA