搜索资源列表
mips_cpu_final
- 一个8位的mips cpu，采用VHDL语言编程。-this is a 8 bits mips cpu core which is writed by vhdl
project3
- mips single cycle cpu
JZ_db_47xx
- 君正最新CPU用户手册，MIPS平台，集合了USB，I2C，UART，LCD，SDRAM等众多接口-Jun is the latest CPU User' s Manual, MIPS platform, a collection of USB, I2C, UART, LCD, SDRAM, and many other interfaces
mips3
- Modelsim+DC开发的4级流水线结构的MIPS CPU-mips 4level cpu
spim-8.0
- 一个模拟MIPS结构cpu的程序，完成cpu的基本功能，用于模拟5级流水cpu-Structure of a simulated MIPS cpu' s program, complete the basic functions of the cpu, used to simulate the 5-stage pipeline cpu,
MIPS_cpu_verilog
- 带流水线的类MIPS CPU verilog源代码-With lines of class MIPS CPU verilog source code
CPU
- 流水式CPU设计，实现在MIPS基础上修改的16位THCO-MIPS指令系统，解决了数据、结构、控制冲突，并实现了软硬中断-Pipelined CPU design, implementation, based on changes in the MIPS 16-bit THCO-MIPS instruction set to address the data structure, control of conflict, and to achieve the hard and soft int
VHDL-for-Datapath
- MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j" Mem.vhd - memory buffer.vhd - buffer ALUcon.vhd - Alu controller pc.vhd - program counter REG - reg
MIPS
- 用verilog语言描述的CPU各部分及相关链接-It about CPU s component and relationship which use verilog
pipeline_code
- 实现了MIPS五级流水CPU,用verilog语言实现-MIPS CPU verilog
vhdl-pipeline-mips0
- MIPS CPU WITH PIPELINE procesador MIPS-FZA -- Autor: mahdi ahmadi -- Email: mahdi@fza.ir -- mahdifza@yahoo.com -- -- Version: 1.0
minimips_latest.tar
- minimips MIPS CPU源码，包括文档说明-minimips CPU source code documentation etc
mips_ejtag
- Mips Ejtag Code! Mips Cpu 调试必备工具！-Mips Ejtag
See_MIPS_Run-2nd_edition-Chinese
- run linux on mips cpu, with mips architecture, instruction and linux porting
EJTAGSpec
- spec for ejtag, which is used to debug mips cpu-ejtag spec, which is used to debug mips cpu
irq_cpu
- This file define the irq handler for MIPS CPU interrupts.
cpu
- MIPS流水线CPU的工作原理和设计方法-The design and implementation of the pipelined CPU
3-David_Harris-Mpis-cpu
- mips的源码 基于hmtl的 学习计算机组成原理的同学可以-mips source hmtl based learning computer organization students can look
See_MIPS_Run-2nd
- MIPS架构CPU的入门书籍，此书讲述了在通用MIPS CPU 上编程需要了解的一切知识。-Book for beginner of CPU of MIPS Architecture，it tells all the knowledge need for the development on the MIPS CPU.
MIPS-and-CPU-design-and-simulation
- 兼容MIPS指令集的CPU设计与仿真 处理器架构为多周期，指令用32为字长（取指占一个周期），4k的存储器（指令存储器和数据存储器分开），IO与存储器统一编制，能支持20条指令以上-MIPS instruction set compatible CPU design and simulation