搜索资源列表
rs_encode
- 这是用verilog编写的RS(204,188)代码,适用于数字电视的BCH编码过程。-This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.
rs-232-zt532
- VC编程环境,演示RS-232打印机编程.-VC programming environment, presentation programming RS-232 printer.
rs-232-zt532
- VC编程环境,演示RS-232打印机编程.-VC programming environment, presentation programming RS-232 printer.
RS-232sender
- 一个串口RS-232 发送模块。基于VHDL语言。-A serial RS-232 send module. Based on the VHDL language.
uarts
- RS-232 interface example for FPGA/EDA developers
rscode-1.0
- RS译码器的C源代码,采用了BM算法,钱搜索,和福尼算法求错误值-the rs decoder c code
RS_Verilog
- rs编解码的verilog实现源代码,从硬件实现rs的编解码-rs codec to achieve the verilog source code, from the hardware codec rs
RSdecoder
- RS信道编码的解码程序。这个适用于解码从信道上接受的编码,从而恢复。-RS decoding channel coding procedures. This applies from the channel decoder to receive the code, thus restoring.
1
- rs coding, for c++,best porogram for decoding and coding
RS232UART
- RS-232是美国电子工业联盟(EIA)制定的串列数据通信的介面标准,全称是EIA-RS-232-RS-232 is the Electronic Industries Alliance (EIA) to develop the serial interface data communications standards, the full name is the EIA-RS-232
RS_Verilog
- RS码的FPGA实现,verilog语言形式,好参考资料-FPGA realization of RS code, verilog language form, a good reference
RS232_Tester
- rs 232 tester program
gf_calu
- RS码译码器C语言工程,为[255,191]码率的译码结构,具有通用性-RS decoder C language works [255,191] the decoding bit-rate structure, with common
rs
- 本程序是通过利用R/S分析法来求解hurst参数,并最后作出直线图求出其斜率得到H值-This procedure is through the use of R/S analysis method to solve the hurst parameter, and the last to make a straight line graph to derive the value of its slope to be H
RS_soft_decoding_developmengt
- rs码的软迭代译码算法,供大家参考,有参考价值。-rs soft iteration
RiBM
- RS 编码,RS码是一类有很强纠错能力的多进制BCH码-RS code
rscode
- RS编码器在fpga上的实现,用的modelsim开发环境-RS encoder in the realization of the fpga, development environment used in modelsim
RS
- reed selemon encoder vhdl code
conn
- 实现两机通信,接口与通信课程设计,rs-232c口进行传输-The realization of the two machine communication, interface design and communication courses, rs-232c port for transmission
verilogHDL
- RS(31,15)译码关键步骤的veilog HDL算法实现,包括关键方程求解,错误位置估计,错误值计算等-RS (31,15) decoding a key step in the algorithm veilog HDL, including key equations, position estimation error, error value, such as