搜索资源列表
FIFO_IN
- EZ-USB简单实现Slave FIFO工作模式。供初学入门~-EZ-USB is simple to achieve the Slave FIFO work mode. For beginner entry to
Cy7C68013-slavefifo-design.rar
- 使用Cypress的Cy7C68013A芯片进行设计,实现Slave FIFO模式的数据采集。程序包括USB固件程序以及主机程序。,Using Cypress' s Cy7C68013A chip design, data acquisition Slave FIFO mode. The program includes a USB firmware and host program.
61EDA_C2212
- 红色飓风II开发板USB2FPGA USB驱动程序,由verilog编写,包括源码和FIFO测试程序-Red Hurricane II development board USB2FPGA USB driver from verilog preparation, including source code and test procedures FIFO
usb_fifo_ft245b
- 基于FT245BM的FIFO接口设计 根据usb blaster改动-FT245BM FIFO interface design based on the changes under the usb blaster
EZ_USB_LOOPBACK
- 本程序:EZ-USB在slave fifo模式下,利用FPGA控制EZ-USB的数据读写-This program: EZ-USB in slave fifo mode, use the EZ-USB FPGA control data read and write
FX3-firmware
- application note focuses on the design of a synchronous FIFO master interface. A master initiates transfers, drives an address bus (if present), and usually supplies a clock to the slave. The slave device used in this design is another FX3 de
wishbone
- Wishbone规范具有如下特点:简单、紧凑,需要很少的逻辑门 完整的普通数据据传输总线协议,包括单个读写、快传输、读一修改一写周期、事件周期 数据总线宽度可以是8-64位 支持大端(big-endian)和小端(litle-endian),接口自动完成两者之间的转换。支持存储器映射、FIFO存储器、交叉互联 握手协议,允许速率控制 可以达到每个时钟周期进行一次数据传输 支持普通周期结束、重试结束、错误结束等总线周期形式 支持用户自定义的标志:采用MASTER/SLAVE体系结构 支持多点进程(
FPGAluojidaima
- 16通道逻辑分析仪,100M,FPGA代码,包括FIFO,dram,usb等-16 channel logic analyzer, 100 m, the FPGA code, including FIFO, DRAM, usb, etc
FT245BL_test
- (1)FT245BL芯片datasheet(2)test,USB 转FIFO 芯片测试的verilog程序-(1) FT245BL chip datasheet (2) test, USB transfer FIFO chip testing procedures verilog
usb_packet_fifo
- usb packet fifo VHDL
FPGA
- 实现USB的slave FIFO功能的FPGA部分-Implementation of USB slave FIFO
GPIF_FIFO_WR_RD
- cY7c68013a usb通信Gpif例程,fifo可读可写
USB_FPGA
- 通过FPGA控制USB实现Slave FIFO模式下的数据传输-achieve the data sending and recieving throgh FPGA by controling the USB working in the Slave FIFO mode
SoftCAN-4.0
- CY7C68013A + XDP512 组成的Slave FIFO 模式,USB2.0传输,传输速度可达3MByte/s。完整的USB芯片代码,完整的主控MCU代码。电路图就不必发了。对于学习68013的Slave FIFO模式是个福音!上位机读写直接用XferData函数就可以了。-CY7C68013A+ XDP512 ,Slave FIFO ,USB2.0,3MByte/s。
fx2fw
- Cypress FX2 Slave FIFO implementation. USB 2.0 High speed mode 40MB/s
FIFOonFPGAtoUSB
- 这个一个基于FPGA的FIFO的传输资料,可以用在USB的传输上,里面有视频有源代码,还有估计的设计,相关的文档说明等等。-The transmission of a data FIFO of FPGA-based, can be used on USB transmission, which has a video source code, as well as estimates of design, related documentation, and so on.