搜索资源列表
HW3
- Write VHDL codes to model an 8-bit counter that counts every second. It counts from your last two digits of your student ID to your next two digits of your student ID. If the last two digits are greater than the next two digits, the counters counts d
Xilinx
- verilog codes for designing decoders , adders
look-up-table-for-sine-wave-generation
- hi this an verilog codes-hi this is an verilog codes
Sine-Waves
- hi this an verilog codes-hi this is an verilog codes
New-WinZip-File.ZIP
- verilog fsm e book to understand verilog codes in finite state machine
verilog-SPI-Controler
- 使用Verilog语言实现的SPI控制器，包括SPI主机和从机代码。-Using the Verilog language implementation of SPI controllers, including SPI master and slave codes.
codes
- verilog code for carry look ahead adder.
SpecmanEliteTutor
- SPECMAN ELITE CODE TUTOR for learning Platform to verify VHDL and VERILOG Codes
Lecture-1
- The content are used to implement the verilog codes in cmos design
MULT
- the document used to describe the verilog codes design floating point multiplier in coms design
mpci32-verilog
- 一个32BIT 33/66MHz PCI CORE，verilog 的RTL CODEs-pci ipcore writen by verilog
verilog-codes
- bit segmentation in wide division code multiple ace-bit segmentation in wide division code multiple acess
5-verilog-programs
- the file contains 5 verilog source codes 1. varying pulses 2. DRAM 3. FIFO 4. UART 5. 16 bit divider
Xilinx-verilog
- xilinx培训源码及工程文件,给予spartan 3E开发板的！希望对初学者有所帮助-Xilinx training codes and project！！ IT‘s worth to learn！！
drink-machine
- Verilog codes for drink machine design project codes
async-fifo
- Verilog codes for asynchrounous fifo design
Pipeline-3.zip
- Verilog codes for pipelined processor,Verilog codes for pipelined processor
counter
- A 4 bit counter. In the testbench I combine three counters into one. Verilog codes with testbench.
Dny_LCD
- LCD verilog codes for labrotuary
DDR3-SDRAM-Verilog-Model(1)
- contains the information and codes of DDR3 memory model