搜索资源列表
sin
- 正弦波发生器。用VHDL语言实现。基本功能。-sinusoid generator
tlc5620_out_sin
- 用ＦＰＧＡ操纵ＴＬＣ５６２０DA转换器，用ＶＨＤＬ语言编写，调试通过，并输出正弦波。-Manipulation TLC5620DA converter with FPGA using VHDL language, debugging through, and the output sine wave.
zhengxianbo
- 正弦波发生器，用VHDL实验，使用地址发生器和lpm_rom完成。-Sine wave generator, experiment with VHDL, use the address generator and lpm_rom completed.
sin_gene
- 读取mif方式，产生正弦信号的vhdl程序-Read mif way to generate sine signal vhdl program
ISE_lab18
- 基于VHDL语言，通过调用Xlinx生产的FPGA开发板上的DDS核，产生正弦信号。并可进行仿真观察。-Based on VHDL language, by calling Xlinx FPGA development board produced by the nuclear DDS, sine signal. The simulation can be observed.
boxingfasheng
- 三角波、正弦波、余弦波、方波的产生VHDL代码程序，可以根据自己的需要得到相应的波形。-Triangular wave, sine wave, cosine wave, square wave generated VHDL code program, according to their own needs the corresponding waveform.
zhengxuanbo
- 产生正弦波的vhdl代码，输出显示波形标准，没有明显的波形失真。-Vhdl code for sine wave generation, the output waveform standards, no significant waveform distortion.
vhdl2
- vhdl语言正弦信号发生器设计，传统的用分立元件或通用数字电路元件设计电子线路的方法设计周期长,花费大, 可移植性差。本文以正弦波发生器为例,利用EDA 技术设计电路,侧重叙述了用VHDL 来完 成直接数字合成器(DDS) 的设计,DDS 由相位累加器和正弦ROM 查找表两个功能块组成,其 中ROM查找表由兆功能模块LPM-ROM来实现。-The traditional use of discrete components or general purpose digital cir
sinbo
- 基于quartus，用VHDL写的正弦波发生器-Based quartus, written in sine wave generator with VHDL
dds
- 基于VHDL语言，主要用于实现正弦波发生器-Based on VHDL language, mainly for the realization of sine wave generator
jibenrenwu1
- 一个用vhdl语言写的简单输出正弦波的程序，适用于初学者-Vhdl language used to write a simple sine wave output of the program, for beginners
FPGA
- 基于FPGA的正弦信号发生器，该程序是由VHDL语言编程而成。-FPGA-based sinusoidal signal generator, the program is made by the VHDL programming language.
singt2048
- 正弦波信号发生器 VHDL-Sine wave signal generator sine wave signal generator
waveform_generator
- VHDL语言编写的波形发生器程序,可以产生方波、三角波、正弦波、锯齿波等波形-Waveform generator written in VHDL program that can generate a square wave, triangle wave, sine wave, sawtooth wave, etc.
singt
- 在EP2C35上用VHDL语言编程实现的正弦波形发生器-VHDL language used in the EP2C35 programming on the sine wave generator
sin
- 基于VHDL硬件描述语言的正弦波利用Maxplus的仿真实例-VHDL hardware descr iption language based on the sine wave using the simulation Maxplus
sin
- 设计一个正弦信号发生器，用VHDL设计出同步寄存器、相位累加器等，正弦ROM查找表建议采用定制器件的方法完成，正弦ROM数据文件可以用C代码完成。-failed to translate
sin
- 基于vhdl的正弦信号发生器，经验证，可作为单独模块使用-The sine signal generator based on VHDL, experience card
func_generator
- 一种可调频率的正弦信号发生器的vhdl实现，含测试文件-An adjustable frequency sinusoidal signal generator vhdl implementation, including the test file
DDS
- dds实现正弦波vhdl dds宏功能模块 实现各种波形-sine vhdl dds dds achieve macro modules to achieve a variety of waveforms