搜索资源列表
Methods-for-Memory-Testing
- regarding vlsi testing
project-mult
- ARRAY MULTIPLIER FOR VLSI
Vs1003VoIPacousticfeedback
- 本文件提出如何提高音质，建立在基本设计的集成电路解决方案的VS10001003手机的VoIP议长VoIP免提电话。这是通过分析声反馈可以对音质的不利影响。该文件还提供了一些提示如何最大限度地消除回音和原代码-The intent of this document is to present suggestions on how to increase sound quality of VoIP Speaker Phones built upon the basic design of VLS
ee547_VLSI_design_lec7_comb_circuits
- Combinational VLSI Circuit Design Procedure
v3-1-4-12
- A Novel VLSI Architecture of Hybrid Image Compression Model based on Reversible Blockade Transform
vlsi
- 参照8051系列MCU中断系统的相应控制应答功能，设计一个具有8个中断源的中断响应控制应答系统-Reference to the 8051 MCU interrupt system, the corresponding control response function, and design an eight interrupt sources interrupt response control response system
VLSI
- 实现crc16的串并连电路，希望大家-Crc16 string and even the circuit, we look
11
- HSPICE 全加全减器设计 带波形仿真文件 超大规模集成电路设计-HSPICE full adder full subtracter design with VLSI design of the simulation waveform files
Attachments_2012_06_28
- A2d converter in VLSI
synthesizable-circuit-design
- 天津大学VLSI系统设计讲义的一部分，作者魏继增，使用Verilog语言-Part of VLSI system design course handout of Tianjin University, by Wei Jizeng, in Verilog language
FTVT_Lab1
- Fault tolerant computing and VLSI testing assignment
D_flop
- D触发器，用于搭建各种时序逻辑电路，是最常用的触发器。目前超大规模集成电路中皆使用该触发器。-D flip-flops used to set up the various timing logic circuit, is the most common trigger. VLSI are using the trigger.
Dual-Elevator-Controller
- VLSI based dual elevator-VLSI based dual elevator
vlsi_Zijian
- A program to do the VLSI linear placement -- VLSI Automation homework-A program to do the VLSI linear placement-- VLSI Automation homework
vhcg_latest.tar
- Viterbi algorithm is the most likelihood decode algorithm of convolution code. Viterbi decoder means the VLSI implementation of Viterbi algorithm. In the area of communication, convolution code is very popular, so how to improve the performance a
05~chapter-03-lfsim
- Slides from "VLSI test" book.
09~chapter-05-lbist
- Slides from "VLSI Test arch" book
03~chapter-02-dft
- Slides from book "VLSI Test principles"
07~chapter-04-atpg
- Slides from "VLSI test" book.
ISCAS 89 源代码
- ISCAS 89基准时序电路集，可由国际互联网通过FTP方式下载得到。它是North Carolina州立大学的微电子中心在IScAS’85基准电路的基础上，从世界各地(包括企业和研究机构)广泛征集到的。国际上时序电路测试算法的结果比较中，大都是采用IsCAS’89基准电路作为测试对象。ISCAS 89基准电路主要应用于时序电路的可测性分析，它们可作为ATPG性能的评估标准，以验证全扫描和部分扫描的测试生成技术。不仅如此，IScAS’89基准时序电路珏可广泛地应用于模拟、故障模拟、形式验证、逻饕