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vs10XXan_spi
- VLSI芯片的SPI连接方法及程序代码，例如它的连接方式，及其不同代码之间的关系-VLSI Solution’s slave VS10xx ICs are typically connected to a microcontroller using two SPI buses. These buses, which share clock and data pins, are called SCI (Serial Con-trol Interface) and SDI (Serial Dat
01~chapter-01-intro
- VLSI Test slides from "VLSI Test arch" book.
DP83901A
- The DP83901A Serial Network Interface Controller (SNIC) is a microCMOS VLSI device designed for easy implementation of CSMA/CD local area networks.
EE5301-Routing
- document is related to computer aided design for vlsi systems
Fire-Fighting-Robot-An-Approach
- robotic code In On-chip DSM and UDSM VLSI Circuits because of increase device densitities and operating clock frequency the crosstalk noise, crosstalk induced delay, interconnect delay , signal integrity affect the performance and reliabilit
Source codes
- Involves source codes of vlsi projects
SMM_PICboard_Examples
- vlsi stepper motor vlsi code
DigitalDesignofSignalProcessing
- This chapter begins from the assertion that the advent of VLSI (very large scale integration) has enabled solutions to intractable engineering problems.
Digital-VLSI-Systems-Design.pdf
- A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog.
VectCPU_1s40_0_81_nov0208
- 国外博士写向量处理机，是和NIOS处理器一起开发的，对这个的研究比较透彻，希望对大家有用-Most previous research into vector architectures has concentrated on supercomputing applications and small enhancements to existing vector supercomputer implementations. This thesis expands the body of
barreldistortionproj
- image processing in vlsi
15-vlsi
- Asynchronous fine grain power gated logic paper get code and logic static used
arbiter-code
- this is design of an multimedia arbiter in vlsi with screen shots
vlsisp1stunit
- It focus on all the basics of vlsi concepts
divider.c
- 改良型除法器，用来模拟硬件VLSI除法器的工作步骤，是设计硬件的前序步骤-improved divider
The_first_CoOS_program
- INTRODUCTION The course program on Verilog HDL Basics is designed for undergraduate education on “VLSI Design” specialization. The course duration is 64 hours, lectures volume is 32 hours, and laboratory works are 32 hours. COURSE GOALS AND OB
Assignment(VLSI)
- Verilog model codes for beginners
Tubes-VLSI
- 64 FFT pada program VHDL
KL-algorithm.v.1.0.2
- Kerlinhan-Lin VLSI bi-partition 算法。 C++程序，一个cpp,一个.h. Kerlinhan-lin是二分图的最小权值算法，经常使用在VLSI电路自动化设计的物理paratition上，在其他的图形问题中也有应用。-Kerlinhan-Lin bi-partitioning algorithm. Mainly used for VLSI CAD design
lfsr
- Ruby LFSR 模拟程序。 可以自动生成任意位数的VLSI test pattern用于VLSI TEST. 含有两种lfsr,等概率LFSR和加权LFSR.-LFSR simulator based on ruby language.