搜索资源列表
soda_machine_mealyamoore
- soda_machine的一个有限状态机，用verilog描述，分别有moore和mealy,还提供了testbench.-soda_machine of a finite state machine, with verilog descr iption, respectively, moore and mealy, also provides a testbench.
Parallel_LDPC_Sim
- 并行LDPC的测试工程，包括编解码，和双码字之间的能量泄露比例；-testbench for parallel ldpc codec
anc dec
- encoder,decoder,testbench and run files
test
- 滤波，实现图像的滤波功能的testbench文件，可以适当参考(Filter filtering, testbench file to achieve image filtering function, you can properly refer to)
mycode
- 这是open silicon interlaken user interface的一个driver,采用的是uvm的架构，能够实现single/dual/quad segment的配置(This is a open silicon Interlaken user interface driver, using the UVM architecture, to achieve the configuration of single/dual/quad segment)
1
- Hi This is an example of file ZIP Best regards
AHB RAM
- Verilog写的 AHB总线接口的SRAM代码，带Testbench。(Verilog wrote AHB bus interface SRAM code with Testbench.)
apb_uart_sv-pulpinov1
- SystemVerilog 写的APB总线接口的uart 代码，带testbench.(Uart code of APB bus interface written by SystemVerilog, with testbench.)
electrical lock
- 一个用Verilog写的电子锁工程，带testbench。(An electronic lock project written in Verilog with testbench.)
Lpfilter_20190503
- 环路滤波器是通信信号调制解调中最重要的一个部分，环路滤波器设计的好坏将直接影响到接收机的性能指标，二阶锁频辅助三阶锁相环路滤波器可以稳定跟踪具有加加速度的信号源，是现代通信中非常实用的技术，本文中详细编写了单载波信号产生模块、信道噪声模块、数字正交下变频模块、鉴频鉴相模块、环路滤波器模块，并包含了完整的testbench模块，对于初学者非常有用。(Loop filter is the most important part of communication signal modulation a