搜索资源列表
spi
- VHDL 实现的SPI接口，在Altera EMP7128 上应用过-VHDL SPI interface, the application of Altera EMP off
spi
- spi接口的vhdl实现，所用器件和ip为xilinx的
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
spi_master
- SPI wishbone master and verification environment
get_6675_temp_2
- MAXII 240 CPLD和6675 开发的0-1023.75度的温度传感数据采集系统，用seg7 LED显示，精度0.25度。探头是K型测温线，Quartus II 6.0调是通过，在cpld开发板上面试验成功-MAXII 240cpld and 0-1023.75 development of 6675 degrees C temperature sensor data acquisition system, using seg7 LED shows that the accuracy o
spi_slave
- SPI slave source code
spi_top_as3693
- LED 驱动器AS3693的控制器代码。适合做LED控制的人-spi interface for led driver as3693
spi_tx
- 关于串口通讯(SPI)的VHDL源程序,可以在通用串口通讯中-On the serial communication (SPI) of the VHDL source code, can be general-purpose serial communication
spartan3e_test
- Drive for ADC-DAC POR FPGA SPARTAN 3E STARTER KIT
tCUSS_SPI-VHHh
- 此为VHDL的SPI通信代码，全部部在一个压缩包中，请仔细阅读后再使用． -This is the VHDL SPI communication code, all the Ministry in a compressed package, please read carefully before use.
sIP__SPIIp
- spi总线的vhdl代码，试了了试能用。希望能对开发者有所帮助。 -spi bus vhdl code, try the test can be used. The hope is to help developers.
TP2_SPI_source
- SPI Source VHDL language descr iption
arcii_spi_001
- simple spi slave operating in mode 0 in VHDL.
spi.tar
- SPI Interface Control RTL VHDL Code
spi_slave_test
- SPI in VHDL originally designed for Spartan 3e
vspi
- SPI串口的内核实现verilog语言和VHDL语言-The serial peripheral interface spi bus
SPI
- 使用VHDL写的SPI Master模块(Using the SPI Master module written in VHDL)
spi
- 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
AD9910-SPI-Interface-master (1)
- VHDL spi ad9910 for FTW