51核，用VHDL编写，通过FPGA验证-51 nuclear, prepared with VHDL, FPGA verification

电子时钟VHDL程序与仿真包含了电子时钟设计的全部代码-good good good good good good good good good good good good good good good

booth multiplier full code the code is tested and runs on vhdl -booth multiplier full code the code is tested and runs on vhdl booth multiplier full code the code is tested and runs on vhdl