搜索资源列表
verilog
- 里面包含了多个verilog源代码例子 包括循环码编解码、加法器等等常用的例子 -Which contains a number of Verilog source code examples include the cyclic code coding and decoding, and so on commonly used adder example
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
Verilog
- verilog manual include all Verilog Language Reference Guide-verilog manual
blif2verilog-v1.2
- 将BLIF（Berkeley Logic Interchange Format）格式的电路转换为verilog代码，使用perl编写，需要perl环境才能使用。 内含BLIF格式的官方说明。-Translate BLIF（Berkeley Logic Interchange Format）circuit to verilog descr iption, the translator need perl environment to run. Please check you have rel
multipler
- There is a multiplier function circuit.The program language is verilog code. We can include it into our module to use it.It is a simple and useful function.
delay_module
- 本代码利用Verilog实现了键位按下时的抖动毛刺的滤波处理，主要包含电平检查模块和一个延迟模块。-This code implements the use of Verilog jitter filtering glitches keys pressed, the main level include checking module and a delay module.
xvlijiance
- 附件包括四个内容1.采用Verilog编写的状态机实现序列检测的ISE工程2.代码文档一份3.原理说明4.使用说明。采用的软件平台是ISE13.3，硬件平台是Spartan-3E。-Accessories include four content of 1 by the state machine Verilog prepared realize sequence detection ISE works 2 code document a 3 principle that 4 instructi