搜索资源列表
aes_core
- AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use,
verilogsetup
- verilog学习软件,可以用其学习,掌握该语言的语法规则和运行环境-Verilog learning software can be used to study and master the language grammar rules and operating environment
DES.rar
- DES算法的verilog实现，实现了硬件IC对DES的构架，可以直接应用在系统当中。,DES algorithm Verilog realized, the realization of the hardware IC framework of DES, can be directly used in the system.
DES_Verilog
- 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test
3des_verilog
- verilog 实现的3DES 和 DES 加解密算法，3DES目前还未被破解。-verilog implementation of 3DES and DES encryption and decryption algorithm, 3DES has yet to be cracked.
Quartusguide_huawei_pdf[1]
- quartus中文全部说明 可以方便初学者使用 改软件-Quartus Chinese full descr iption can be easily changed to use software for beginners
sha_core
- 安全散列函数的VERILOG实现，通过了fpga验证，在系统正可以直接当IP盒应用-Secure Hash Function VERILOG achieve, through the FPGA verification, the system is can be directly applied when the IP box
crc
- 这是CRC字符串校验的源码，可对字符串校验后输出校验码-This is the CRC checksum of the source string can be output after the string checksum validation code
mul_fft_96bit
- 基于Fermat数变换的大数相乘运算的Verilog实现，可应用于RSA加法芯片中。-Fermat number transform based on multiplying large numbers operations Verilog implementation, can be applied to RSA chip.
Testbench
- 这是一段verilog的调用测试例子，可以以此作为参考，对其他verilog仿真时，进行调用。-This is a verilog call the test example, can be used as a reference, on the other Verilog simulation call.
LEDD
- 此例为LED流水灯设计，采用verilog编程,可实现流水灯左右移，增加了分频模块，充分利用实验板LED灯资源、开关资源、按键资源。-This example is water LED lights design, using verilog programming, can be moved around water lights, increasing the frequency module, make full use of experimental board LED light re
aes_core_latest.tar
- AES算法的verilog实现，可以综合，有使用价值-Verilog realize AES algorithm can be integrated with the use of value
FPGA-IMPLEMENTATION-OF-AN-AES-PROCESSOR
- Advanced Encryption Standard(AES) implementing in a faster and secured way is expected. AES can be implemented in software/hardware. In hardware implementation ASIC solution requires high cost and much design time while FPGA based implementation
rc4_crypt
- 自己写的rc4加解密算法部分的verilog代码，可综合，供大家参考-Write your own encryption algorithm verilog codes rc4 section can be integrated, for your reference
DW_apb_rtc
- verilog实现RTC功能，可直接用于芯片开发中。-verilog achieve RTC function can be directly used for chip development.