搜索资源列表
79419138ViterbiFPGA
- Viterbi algorithm is used for Forward Error Correction codes for wire less communication net works.-Viterbi algorithm is used for Forward Error Correction codes for wire less communication net works.
DES_Encrypt_Decrypt_Verilog
- DES加密算法的Verilog HDL实现,带模式选择端口,可以实现加密和解密,已经modelsim仿真通过。-Des En/Decrypt,Verilog HDL code
aes
- 其程序是用xilinx环境下编写的,风格是Verilog,请大家提意见。-The program is written using xilinx environment, style Verilog, please comments.
wireless1
- NS2网络层仿真的材料,可动态调整发射功率-NS2 network layer simulation of materials, which can dynamically adjust transmit power
VHDL_hammingcode
- 自己做的信道编译码,(4,7)汉明码的加错解错源代码-Do their own channel coding, (4,7) Hamming code plus misconception wrong source
DES
- VHDL语言编写的DES算法,可以参考一下。 -VHDL language of the DES algorithm for reference.
b
- 基于VHDL的数字时钟设计与实现。。。。可以实现时钟,秒表-VHDL-based Design and Implementation of Digital clock. . . . Can achieve clock, stopwatch. .
DESsuanfa
- DES的加解密算法的实现,无错,非常适合毕业设计运用-DES encryption and decryption algorithm, error-free
64R4SDFpoint_FFT
- 该工程实现了一个64点FFT,verilog编写,采用R4SDF结构,通过Modelsim功能仿真,压缩包里有rtl代码,dc脚本,输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc scr ipt, the output repo
ASM
- 按键扫描程序 ASM。1. 键盘采用4*5矩阵键盘,含有两个组合键. 2. 硬件连接比较混乱,且各个按键的排列与面贴上的键码对应混乱.如果采用教科书上常规矩阵键盘的 扫描方式实现比较繁琐. 3. 需要识别两个双键,但这两个双键位置比较特殊K17,K18和K19,K20. 4. 基于2,3两点.这里采用列,行分别输出全零,读取行,列的引脚电平信息.综合这两组信息查表获取键值. 对于单键按下,有两个位为0.对于两个按键按下,有3或4个位为0. -Key scanne
SBOX
- sbox implementation in vhdl
PCK_CRC3_D4
- CRC校验码生存程序 校验序列码生成多项式: X16+X13+X12+X11+X10+X8+X6+X5+X2+1 输入数据为16个字节(128位),输出16bit校验序列-CRC, the survival program check sequence code generator polynomial: X16+ X13+ X12+ X11+ X10+ X8+ X6+ X5+ X2+1 input data is 16 bytes (128 bits), output 16bit
AES_N
- AES encryption algorithm for VHDL implementation, it is very useful and tested on sp3 kit
mini_aes_latest.tar
- mini_aes加密算法的vhdl实现,带有简易PDF介绍-mini_aes encryption algorithm vhdl implementation, introduced with a simple PDF
avs_aes_latest.tar
- AES algorithm decryption Encryption
rsalatest.tar
- rsa encryption using montegomery multiplication algorithm
cpu
- 基本功能的cpu,自定义内存内容~了解CPU运作原理~-design of cpu,VHDL environment~
novas-verdi-debussy-user-manual
- springsoft 公司的 verdi (仅支持linux unix) 是debbusy的升级版 ,eda 工具,自动批量差错 -verdi(only on linux unix) , such as debbusy,eda tools , debug verilog vhdl code。 trace reg drive and load
XINHAO
- 简易的信号发生器常见波形的VHDL编写程序。-Common waveform signal generator VHDL programming. Common waveform signal generator VHDL programming.
ADC0809
- 应用VHDL语言实现了模数转换,利用的是adc0809-Application VHDL language realized the modulus conversion,Taking advantage of the adc0809