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通用非同步傳送接收器
- 使用 VERILOG 編程 UART 傳輸協定 ( 以一次4BYTE為例 ),環境為 QUARTUS II 9.0 ,附專案檔及模擬檔
uart
- Verilog实现串口收发数据,包括整个quartus工程-Verilog serial port to send and receive data, including the whole quartus project
uartnew
- 好用的UART通信源码,使用Verilog 编写 在QUARTUS下完成,并用ModelSim仿真通过-Source-to-use UART communications, the use of Verilog in Quartus to complete the preparation and use of ModelSim simulation through
URAT_VHDL
- 基于FPGA的 UART 通信,在quartus 7.2编译通过。含全部源码和仿真图形-FPGA-based UART communications, quartus 7.2 in the compiler through. All source code and simulation with graphics
crack_qii72_b151
- quartus2版本7.2破解软件,内有说明,可以使用-quartus2 crack version 7.2 software, which has made it clear, you can use
RS232
- 使用Quartus进行通信时,当数据量大时,需要借助于计算机,其中一种办法就是串口通信-Use Quartus to communicate, when large volumes of data, we need the help of a computer, and one way is to Serial Communication
simulator_ISA
- about ISA connection s simulater in Quartus -about ISA connection s simulater in Quartus
2freq_uart_se
- 高精度串口频率计VHDL源码,开发环境为Quartus II 9.0,频率范围为0-1MHz-Precision frequency meter serial VHDL source code, development environment for Quartus II 9.0, the frequency range of 0-1MHz
yima
- Verilog语言描述38译码器功能,适用于ISE或者quartus软件-Verilog language descr iption 38 decoder function for ISE or quartus software
uart程序_quartus_verilog
- 该程序实现uart串口收发数据,按照通信数据格式,代码编写规范,实现fpga中uart通信功能。(The program realizes the UART serial transceiver data, according to the communication data format, code specification, to achieve UART communication function in fpga.)
d974d4330bf7
- 这是一个非常完整的qpsk调制解调用fpga实现的工程,在工程中已经能够正常使用,使用的quartus ii 开发,使用Verilog语言,文件中还包含了各种滤波器的系数文件,还有matlab仿真文件,整个工程包含从串并变换,相位映射,到成型滤波,中通滤波,cic滤波,调制,再到解调过成的下变频,匹配滤波,载波提取,位定时,判决,整个完整的过程(This is a very complete QPSK modulation and demodulation using FPGA implemen