搜索资源列表
vedio_collection.rar
- 在这个压缩包里，包含了关于视频采集知识的一些基本的介绍。并且在里面还包含了一个基于spartan-3E的视频采集实验,The compressed pack contains some fundemental introdutions about video collections .What s more ,there is a referenced lab on vedio collection which is based on spartan-3E!
hardh264
- 一个硬件H264编码的VHDL源码，用于FPGA开发，适合IP摄像头等视频设备输出数据的编码。用Xilinx工具测试过，但代码不只是用于Xilinx。-A hardware h264 video encoder written in VHDL suited to IP cameras and megapixel cameras. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools
pro_4d1
- 此代码可实现8bits 108M 4路BT656 像素交织输入转为8bits 108M 4路行交织的视频数据，并有仿真文件，在modelsim中运行即可。-This code can be realized 8bits 108M 4 way BT656 pixel interleaving input into 8bits 108M 4 way line of cutting the video data, and there are simulation files can be run in
jpeg_latest.tar
- JPEG descr iption by vhdl
camera_up
- Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备，另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号，然后下采样生成16bit RGB 5：6：5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转，以便适应手持式设备在移动环境
VideoDemystified
- 视频信号的形成，基本概念，相关标准，格式，以及视频处理的过程-Video Demystified- Handbook for the Digital Engineer (4th Ed) [Elsevier, 2005]
DE1_CAMERA
- an example of using a camera modul with i2c
sram_saa1117verilog
- 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
video_capture_rev_1_1
- 视频图像的捕捉系统的实现，主要是基于XILINX系统的实现-Video image capture system implementation is mainly based on XILINX System
CCD
- 本设计主要用来进行图像采集处理，通过摄像头采集图像信息，经过插值算法后存储到外部SDRAM，然后读取图像数据，进行边缘滤波处理后经VGA输出到屏幕上。-This design is mainly used for image acquisition and processing,through the camera capture image information,after interpolation to the external memory after the SDRAM,and th
BT656
- 此设计主要是完成BT656格式的视频数据的采集(VHDL)-this digital logic design is used to sample the BT656 format frame !
CD1_OV5620_SAVE_UDP_TRANS
- OV5620 VHDL CODE, Alter FPGA Source Code.
sp6-ov7670
- 包含了用Spartan6控制OV7670的VHDL源程序，以及PC上的测试程序。对于学习EZUSB的朋友很有帮助。-OV7670 includes the use Spartan6 control of VHDL source code, and test program on the PC. EZUSB for learning helpful friends.
Release
- 分解视频的每个像素的RGB信号，主要用于做VHDL仿真的do文件-Each pixel RGB video signal decomposition, mainly used to make VHDL simulation files do