搜索资源列表
clk
- Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules.
CLK_V
- Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。采用Verilog语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. The use of Verilog language.
stopwatch
- Quartus II工程压缩文件，是一个典型的基于FPGA的秒表工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based project of the stopwatch, a 50MHz frequency, counting, decoding modules. Using VHDL language.
JIJIAQI
- Quartus II工程压缩文件，是一个典型的基于FPGA的计价器工程项目，有有限状态机、50MHz分频、计数、译码、动态扫描等模块。-Quartus II project files, is a typical FPGA-based project of the meter, there are finite state machine, 50MHz frequency, counting, decoding, dynamic scanning module.
qiangdaqi
- Quartus II工程压缩文件，是一个典型的基于FPGA的抢答器工程项目，有计数、BCD译码、动态扫描等模块。-Quartus II project files, is a typical browser-based FPGA Answer Project, a count, BCD decoding, dynamic scanning module.
examples
- 该压缩文件 是众多基于LINUX下 QT编程 许多初学者 使用的应用程序-examples
hs0038b
- 基于msp430f449的串口实现的红外通信模块，压缩包里含有发射和接收两个文件夹，发射器件为一般的红外线发射管，接收用的是HS0038B，HS0038B出来还要通过一个反向器再与MCU相连。-Msp430f449 based on the realization of the serial infrared communication module, compression bag containing two transmitting and receiving folder, fired
TrafficLight
- 用vhdl写的交通灯程序，压缩包内有整个工程文件-With the traffic lights to write vhdl procedure, compressed package files have the whole project
PS2V2
- 为凌阳61板写的ps键盘驱动程序，压缩包内为整个工程文件-Sunplus 61 boards for the written driver ps keyboard, compressed package for the entire project file
lm016lSimpleApplication
- 本压缩文件里有51ASM文件，DSN文件，经过仿真能显示自创字符，要想有自己的汉字只需套用本程序即可-The compressed file has 51ASM paper, DSN file, the simulation can show their own character, to have their own characters can only apply this procedure
74HC161
- 74ls161 基于verilog语言的实现 源程序在压缩包的hdl文件夹中-74ls161 language based on the realization of verilog source package in compressed folder hdl
74HC283
- 74ls283 基于verilog语言的实现 源程序在压缩包的hdl文件夹中-74ls161 language based on the realization of verilog source package in compressed folder hdl
PCB_design_crosstalk_serpentine
- 压缩文件里面包含：PCB布线技术；PCB层叠设计基本原则；串扰的形成与解决；混合信号PCB的分区设计；我也说说0欧姆电阻的用途；详解蛇形走线的作用。-Compressed file which contains: PCB routing technology PCB design of the basic principles of layering the formation and settlement of cross-talk the district mixed-signal P
LPC2148_USB_uCOS
- 本软件包含有嵌入式操作系统uC/OS-II下，ARM7内核芯片LPC2148 USB的固件驱动程序。此代码用C语言在ADS1.2集成开发环境中开发并调通，可在实际工程中使用。USB外围电路、PC界面接口代码和使Windows98/2000/XP识别USB的驱动文件以及重要接口函数说明也在压缩包中。-This package mainly contains the USB firmware codes of the LPC2148 under the uC/)S-II operating syst
ad
- 2812AD转换的程序,压缩包中为整个工程文件 -2812AD conversion process, compressed package for the entire project file
can
- 2812CAN转换的程序,压缩包中为整个工程文件 -2812CAN conversion process, compressed package for the entire project file
cputimer
- 2812定时器转换的程序,压缩包中为整个工程文件 -2812 timer conversion process, compressed package for the entire project file
gpio
- 2812IO口的程序,压缩包中为整个工程文件 -I 2812IO procedures, compressed package for the entire project file
spi
- 2812SPI产生的程序,压缩包中为整个工程文件 -Procedures have 2812PWM, compressed package for the entire project file
timer
- 2812TIME产生的程序,压缩包中为整个工程文件 -Procedures have 2812TIME, compressed package for the entire project file