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- 脉冲多普勒雷达回波信号相干积累的VHDL源程序-pulse Doppler radar echo signal coherent accumulation of VHDL source
VHDL-radar
- 脉冲多普勒雷达回波信号相干积累的VHDL源程序-Coherent pulse Doppler radar echo signal accumulation VHDL source code ,it is easy to use
DSP-FPGA1
- 用altium designer画的一个脉冲雷达信号源的硬件原理图。有dsp和fpga。-Altium designer painting with a pulse radar signal source hardware schematics. There dsp and fpga.
DSP_Finals
- 使用DSP对雷达回波信号进行脉冲压缩、MTI及MTD处理。-Using DSP for echo signal pulse compression radar, MTI and MTD treatment.
sp6ex14
- verilog,ISE工程。倒车雷达实例,每100ms产生1个超声波测距模块所需的10us高脉冲激励,并用数码管以16进制数据显示经过滤波处理的回响信号的高脉冲计数值(以10us为单位),与此同时,蜂鸣器根据障碍物远近,也会相应的发出不同频率的响声。-verilog, ISE project. Reversing radar instance, every 100ms high pulse generating 10us required an ultrasonic ranging module