搜索资源列表
Convolutional encoding and Viterbi decoding with k
- 卷积码编码和维特比解码 当K为7 时 供大家参考Convolutional encoding and Viterbi decoding with k 7 rate 1 2 -convolutional coding and Viterbi decoding when K 7:00 for reference convolutional encoding and Viterbi decoding with k 1 2 7 rate
ADSP_BLACKFIN533
- ADSP-BLACKFIN533 平台上实现卷积编码 -ADSP-BLACKFIN533 platform to achieve convolutional coding
ADSP_BLACKFIN561
- ADSP BLACKFIN561上实现卷积编码 -ADSP BLACKFIN561 achieve Convolutional Coding
conv_code
- 用VHDL实现卷积码编码，该码为（2.1.3）型卷积码。-using VHDL Convolutional coding, the code (2.1.3) - Convolutional Codes.
tx_inter
- Convolutional Interleaver Encoder-convolutional Interleaver Encoder
viterbidecoder
- 提供实现了（2，1，7）卷积码的维特比译码的源程序，采用了最大似然算法，介绍了软判决维特比译码算法过程的三个步骤：初始化、度量更新和回溯译码。-for achieving a (2,1,7) Convolutional Codes Viterbi decoding of the source, using the maximum - likelihood algorithm, introduced a soft-decision Viterbi decoding algorithm of the
juanjima
- 卷积码的生成程序,为(2,1,3)移位寄存器的卷积码生成-Convolutional code generation process for the (2,1,3) convolutional code of the shift register to generate
chengxu
- 一个分频器，一个卷积编码器的程序，都是VDHL的-A frequency divider, a convolutional encoder program, are VDHL of
viterbi
- verilog程序，实现了（2，1，4）卷积码编码，和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
ViterbiDecodeK9R12HardDecision
- viterbi 硬判决译码，基本实现了（2，1，9）卷积码的硬判决译码，用modelsim RTL仿真通过-hard-decision viterbi decoding, the basic realization of the (2,1,9) convolutional codes hard decision decoding, using modelsim RTL simulation through
nonsystem
- Generate trellis data of a rate-1/n convolutional encoder.卷积码1/n的编码器，注意生成的是非系统码。-Generate trellis data of a rate-1/n convolutional encoder. Convolutional codes 1/n of the encoder, the attention generated by the non-system code.
115157715conv_code
- FPGA实现卷积码的功能 是一个卷积码的编译码过程实现 -FPGA realization of the function of convolutional codes
DTFT
- 该程序可以用于验证DTFT的各种性质，包括时间反转特性、频率反转特性、卷极性、调制性等等。-The program can be used to verify the nature of the various DTFT, including time-reversal properties,frequency-reversal properties, convolutional properties, modulational properties and so on.
conv_enc
- 这是一个用VERILOG HDL编写的卷积码程序-This is a VERILOG HDL with the preparation of procedures for the convolutional codes
TELECOM2
- This file contains program files associated with the paper titled "US Digital Cellular Error-Correction Coding Algorithm Implementation on the TMS320C5x", Telecom Applications With The TMS320C5x DSPs, Application Book, 1994, SPRA033. This file c
Convolutionalencoder
- 应用VHDL语言实现的卷积编码器的应用程序-Application of VHDL language implementation of the convolutional encoder applications
project
- convolutional encoder vhdl code, rate 1/2, k=3
viterbi
- viterbi decoder with convolutional encoder
123
- 将通过仿真的VHDL 程序下载到FPGA 芯片EPF10K10LC84-3 上，取得了较为满意的结果。本设计选择的(3,1,2)卷积码和（2,1,1）卷积码,都是极具代表性的卷积码。因为卷积码具有相似的结构和特点，所以(3,1,2)卷积编码器和（2,1,1）卷积解码器的设计思想，具有普遍适用性。-Through the simulation of the VHDL program downloaded to the FPGA chip EPF10K10LC84-3, the obtained s