搜索资源列表
fifo_core
- 经典的FIFO实现源码，里面有三种类型，是xilinx工程师写的，经典-Classic source FIFO implementation, there are three types, are written by xilinx Engineer, classical
myfifo
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_syn
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave0
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave1
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
FIFOinterface
- fifo(8):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
Flash_ROM_lab
- 用SmartGen生成一个256*8的大小同步FIFO，并通过串口发送数据初始化FIFO。然后，再通过串口返回到上位机的串口调试程序显示，确认数据是否正确。-SmartGen generated with a size of 256* 8 Synchronous FIFO, and sending data through the serial port to initialize FIFO. And then back through the serial port to the PC ser
fifo1
- 异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been
int_uart8051
- UART realization for at89c5131 with FIFO and interrupts.
FIFO
- FIFO，vhdl实现，希望可以有帮助,大家加油-FIFO VHDL
fifo
- A First in first out buffer in Verilog
fifo8
- FIFO 源程序，verilog HDL实现，自己验证过，没问题-FIFO source, verilog HDL to achieve their own verified, no problem
fifotop
- 基于FPGA编写的VHDL语言，FIFO代码程序。 程序完整。-VHDL-based FPGA written language, FIFO procedure code. Complete the procedure.
FIFO_test
- FIFO程序库,添加即可使用,一个非常实用的程序-FIFO library, add to the use of
cc2430_lib_and_app_1.0
- CC2430RF代码,DMA方式发送，FIFO方式-RF CC2430
fifo_vhdl
- FIFO的VHDL编程，其中包括FIFO的读，写，满帧，半满帧信号驱动-FIFO of the VHDL programming, including the FIFO' s read, write, full frame, half-full frame signal drive
2
- 在MCS-51系列单片机应用系统中利用FIFO芯片AL422B实现数字图像的静态存储-In the MCS-51 series single-chip applications using FIFO chip AL422B static digital image storage
fifo_ptrs_gray
- fifo pointers in verilog gray code utilization for synchronius
ASYNCFIFO
- 异步FIFO的FPGA实现,XILINX FPGA, ISE ,VHDL语言实现-asynchronous fifo
use_SRAM_design_FIFO.pdf
- 利用sram技术设计的一个FIFO-failed to translate