搜索资源列表
H.264verilog
- H.264编码的verilog源代码，希望各位研究研究，定会有收获的-H. 264 coding verilog source code, how to understand, hope that you study
Verilog-HDL-intra_prediction
- 基于H.264的帧内预测中4×4块的9种预测方法的源程序-H.264 intra prediction based on 4 × 4 block prediction method of the source 9
video_systems_latest.tar
- This file is for implenet H.264 on FPGAs.
H[mm.264
- 这是一个描述的文档，教你怎么写Verilog关于H264 的文章那个，考了非常受启发。-This is a descr iption of the document, teach you how to write Verilog that the article on the H264, the test is very enlightening.
h264.tar
- h.264 bluespec system verilog source code
DSP_h264_VariableBlockSize
- 這是用verilog HDL實現H.264可變block大小的源碼。為了使其能在FPGA上運作，還加入了我自己的改善。-A verilog HDL code for H.264 with variable block size and my own improvement.
nova_latest.tar
- VERILOG source code of a H.264 baseline decoder.
mc_t
- 利用verilog实现H.264中半像素插值功能。30个周期完成一个4x4块儿的横向、纵向和斜向的插值。-Verilog implementation using H.264 in the half-pixel interpolation function. 30 cycles to complete a 4x4 pieces of horizontal, vertical and diagonal interpolation.
Cabad
- MPEG-4/AVC - H.264 CABAC decoder written in VHDL and synthesis on a Virtex 5
H.264decodeVerilog
- 基于FPGA的EDA设计技术，用Verilog硬件设计语言解压缩H.264格式的视频压缩文件。-FPGA-based EDA design, using Verilog hardware design language decompress H.264 video compression format file.
nova_latest
- h.264完整的解码器，用verilog实现，属于opencores-h.264 full decoder, implemented by verilog, one of opencores
jpeg_mpeg_264_src
- 最完整的jpeg/mpeg4/h.264 verilog hdl 源码集合-The most complete collection of jpeg/mpeg4/h.264 verilog hdl source
nova
- 基于H.264 视频编解码 verilog 基于H.264 视频编解码 verilog-Verilog based on the H.264 video codec based on H.264 video codec Verilog
IQIT
- Inverse quantization and DCT for h.264 in verilog
bluespec-h264_latest.tar
- H.264硬件视频解码，采用verilog代码设计，支持1.5M时钟下30bps的QCIF分辨率的实时视频解码-H. 264 hardware video decoder, use verilog code design, support under 1.5 M clock 30 BPS QCIF resolution of real-time video decoding
H.264_verilog
- 基于verilog的H.264视频压缩技术的源代码，包括verilog源代码，以及仿真波形文件，希望对大家有用-verilog h.264
H.264-for-FPGA
- This Book describe about H.264 encoder using Verilog HDL
buffer
- Hi iam Ramana a research scholar,doing my phd from sathyabama university. Title: Designa video codec h.264 processor using verilog hdl. i request you to send video codec H.264 on Verilog hdl. regards D Ramana, M.Tech(Ph.D) SATHYABAMA