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Polyphase_filterbank_user_manual
- The polyphase filterbank algorithm is a very efficient way to implement a uniformly distributed multi-channel filterbank using a Fast Fourier Transform (FFT).
polyphase
- The current portion of the collaboration has involved the feasibilty and implementation of a Polyphase Filter bank using various FPGAs and hardware architectures
duoxiang
- 多相滤波器的FPGA实现结构,基于QuartusII8.1实现-Polyphase filter FPGA implementation structure to achieve based on QuartusII8.1
digital-quadrature-down-converter
- 基于FPGA的数字正交下变频器设计,在ALTERA的DE2开发板上设计一个多相滤波结构数字正交变换器。其中多相滤波模块是最关键模块,该模块将64阶滤波器的系数分成奇偶两路,并通过VHDL常数的方式存储在模块内部。这些常数是通过在MATLAB中调用FDATool,根据滤波器的参数要求来生成的。这些浮点格式的滤波器系数还需要在MATLAB中计算成二进制补码的形式,才可以存储在模块中。-FPGA-based digital quadrature down-converter design, ALTER
wola
- WOLA polyphase filter加权跌接累加FFT信道化技术-WOLA polyphase filter bank
IIR
- 急于IIR的多相滤波器设计,很好的诠释了多相滤波器在信道模型中的应用-The eager IIR polyphase filter design, interpretation of the polyphase filter in the channel model
ddc
- 信号处理前端 数字下变频 多相结构滤波 包含fir滤波器设计 非核- polyphase filter fir filter design DDC
code-pour-decim-poly
- this code is for a decimation filter with polyphase structure , so the original filter is decomposed by 5 filters which is the decimation factor in that case and each of them is selected each Fs/5
duoxiangchouqu
- 该程序采用多相分解方式实现的抽取器滤波器,该抽取器的运行速度要比向下采样器的通常FIR滤波器的速度快R倍。-The program uses polyphase decomposition way to achieve the decimation filter, the speed of the extractor runs faster than the down sampler of the FIR filter is generally faster R times.
sdfdsfsdf
- 多实际声音信号采用了多相滤波 多实际声音信号采用了多相滤波 -More realistic sound signals using a polyphase filter more realistic sound signals using a polyphase filter
polyphaseFIR_1v0
- polyphase fir dilter
polyPhaseFilter
- 数字信道化过程中多相滤波器组matlab代码及测试(Digital channelized polyphase filter code and test)
