搜索资源列表
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altera公司的fpga源代码，用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
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用FPGA开发的串口通信的程序，代码是用verilog编写的，希望对大家有用！-Serial communication with the FPGA development process, the code is written in verilog and hope for all of us!
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本例为自己编好的VHDL的基于uart的FPGA的
设计。-In this case for their own good VHDL code uart of FPGA-based design.
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UART（通用串行收发器）的VHDL源代码，适合硬件工程师在FPGA内部实现多个UART-UART (universal serial transceivers), VHDL source code for hardware engineers in the FPGA to achieve multiple internal UART
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vhdl code for uart. data tx from pc to fpga nd vice versa
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UART code using VHDL for FPGA or ASIC
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UART transmission vhdl code, for nexys 3 fpga board
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