搜索资源列表
divide
- Verilog hdl语言的常用除法器设计,可使用modelsim进行仿真-Commonly used languages Verilog hdl divider design, can use the ModelSim simulation
VerilogHDL-huawei
- Verilog HDL 华为入门教程.pdf 内部资料-Verilog HDL Tutorial Huawei. Pdf internal information
traffic
- Verilog HDL语言设计的交通灯设计-Verilog HDL language designed traffic light design
Verilog_HDL_language_learning
- Verilog HDL语言练习与讲解 里面有很多实用的源代码-Verilog HDL language exercises on the inside and have a lot of useful source code
VerilogHDL
- Verilog HDL 华为入门教程-网络上比较经典的学习资料-Verilog HDL Tutorial Huawei- Network Learn more classical information
HuaweiFPGAdesignflowguide
- 华为内部的FPGA设计培训教程,详细阐述了设计流程图、Verilog HDL设计、逻辑仿真、逻辑综合。对大家的学习一定有帮助的。-Huawei within the FPGA design training tutorial, a detailed flow chart of the design, Verilog HDL design, logic simulation, logic synthesis. Study of the U.S. must have help.
16bitCLA
- 基于Verilog HDL的16位超前进位加法器 分为3个功能子模块-Verilog HDL-based 16-bit CLA is divided into three functional sub-modules
Verilog_HDL_progamming
- Verilog-HDL程序设计实用教程收集,内容丰富,设计技巧多样。-Verilog-HDL Design Tutorial practical collection, rich in content and variety of design skills.
BEIHANGVerilogjiaocheng
- 北航Verilog教程. Verilog HDL基本结构 数据类型及常量、变量 运算符及表达式 语句 赋值语句和块语句 条件语句 ... -BUAA Verilog Tutorial. Verilog HDL data types and the basic structure of constants, variables and expression operator assignment statements and conditional stat
miaobiao
- 用Verilog HDL编写的秒表设计,可以实现百分之一秒,十分之一秒,秒,十秒等功能。-Verilog HDL prepared with a stopwatch designed to achieve the hundredth of a second, one-tenth of seconds, seconds, 10 seconds and other functions.
alu
- 设计带进位算术逻辑运算单元,根据74LS181功能表,用Verilog HDL硬件描述语言编程实现ALU181的算术逻辑运算功能,编辑实验原理图,在算术逻辑单元原理图上,将其扩展为带进位的算术逻辑运算单元,对其进行编译,并设计波形对其进行仿真验证,最后下载验证-Design into the digital arithmetic logic operation unit, in accordance with menu 74LS181 with Verilog HDL hardware desc
Revised_Verilog_code
- 简弘伦:Verilog HDL IC设计核心技术实例详解 源代码,更新版本-Honglun Jian, Revised Edition. Source coude of " Core Techniques of IC design"
I2C19861208888
- i2c总线模拟,verilog hdl编写的总线模拟控制程序-i2c bus simulation, verilog hdl prepared bus analog control procedures
verilog_HDL_examples
- 本书介绍了大量verilog HDL程序设计的实例,对于verilog语言学习者和从事相关工作的工程师来说,都有一定的学习和参考价值。-The book introduced the verilog HDL programming a large number of examples, the verilog language learners and engineers engaged in related work both in terms of learning and a certai
Verilog-HDL-code
- verilog 经典例子的源码 非常适用于初学verilog的朋友们-classic example of verilog source code
i2_cmaster
- verilog HDL i2c主机代码-verilog HDL i2c host code
VERILOG.HDL
- Verilog 硬件描述语言. 很好的学习HDL语言的书籍资料.-Verilog HDL , a very good book for learning Verilog.
RAM_Examples
- Verilog hdl code for representing ram and rom "memory" using many methods
verilog
- Verilog HDL程序设计教程常用verilog模块,特别好的学习资料-" Verilog HDL Programming Guide" verilog modules used, in particular, good learning materials
traffic
- 一个很好的交通灯控制的Verilog HDL实现方式,包括LED显示部分。-A good control of traffic lights to achieve the Verilog HDL, including the LED display.