搜索资源列表
viterbi_fpga
- viterbi译码器的一种fpga实现.是一个cs252 的project的result 供大家研究用-Viterbi Decoder they simply a realization. Cs252 is a result of the project for all research
SKRETD(low_power)
- 硕士论文，viterbi译码器的低功耗设计，最后附带源码，VHDL-master's thesis, Viterbi Decoder low-power design, the final collateral source, VHDL
gsmch
- gsm的卷积码编码和viterbi译码的源码-gsm convolution encoder and Viterbi decoding FOSS
VDK9R12
- viterbi译码器（2.1.7），里面什么都有，测试模块，编码模块和译码模块-Viterbi Decoder (2.1.7), which has everything, testing modules, Encoding and decoding module module
viterbi
- (2,1,9)卷积编解码器，译码部分采用Vitebi译码算法，设计使用Verilog HDL语言，在Modelsim平台下仿真通过
Viterbi_RAKE
- 这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着
viterbi_node_sync_design
- 一个完整的viterbi译码程序和测试的程序
viterbi译码
- verilog源代码
ViterbiDecodeK9R12HardDecision
- viterbi 硬判决译码，基本实现了（2，1，9）卷积码的硬判决译码，用modelsim RTL仿真通过-hard-decision viterbi decoding, the basic realization of the (2,1,9) convolutional codes hard decision decoding, using modelsim RTL simulation through
mywork1
- 卷积码的viterbi译码，用Visual dsp 开发-viterbi
convolutional_code
- 卷积码编码,经过模拟的有噪信道,viterbi译码,汇编实现-Convolutional coding, through the simulation of noisy channel, viterbi decoding, compiling achieve
vit_dec_with_notes
- 带有注释的维特比译码器。经过试验完成，准确无误。-Annotated with Viterbi decoder. After test completion, accuracy.
viterbi
- 有关信号处理方面的源代码，卷积码的维特比译码函数-failed to translate
viterbi
- 维特比译码，卷积编码，verilog编写，2,1,2编码-Victor than decoding, convolution code, verilog write, 2,1,2 coding
Viterbi-Compiler-User-Guide-(ver
- Altera的Viterbi译码IP软核使用说明-User guide of Viterbi decoder IP core.
viterbi_decoder_axi4s
- Viterbi译码器的verilog代码和测试-Verilog code and testing of the Viterbi decoder
convotion_decode
- 用verilog写的卷积码的编码程序以及viterbi译码程序-Use verilog write convolution code coding procedures and viterbi decoding program
viterbi-ip-core-using-mothed
- FPGA的Viterbi译码器IP 核的使用说明，简单方便，一目了然。还能进行tcm译码，功能强大呀-Instructions for use of the FPGA Viterbi decoder IP core, easy glance. Can tcm decoding powerful!
viterbi
- 维特比译码相关verilog代码，基于802.11g协议的。。
viterbi
- 一种基于FPGA的Viterbi译码器一种基于FPGA的Viterbi译码器-FPGA-based Viterbi decoder FPGA-based Viterbi decoder