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viterbidecoder
- 提供实现了（2，1，7）卷积码的维特比译码的源程序，采用了最大似然算法，介绍了软判决维特比译码算法过程的三个步骤：初始化、度量更新和回溯译码。-for achieving a (2,1,7) Convolutional Codes Viterbi decoding of the source, using the maximum - likelihood algorithm, introduced a soft-decision Viterbi decoding algorithm of the
verterbicode
- 使用dsp编程，实现信道编码中卷积编码，并使用维特比对编码进行译码。-Use dsp programming, channel coding convolutional coding and Viterbi decoding on the encoding.
codec54x
- 卷积编码和维特比译码在C54上的实现，该程序采用C和汇编混合编程的方式。-Convolutional coding and Viterbi decoding on the C54 implementation, the program mixed with C and assembler programming approach.
Control
- 维特比译码器控制器部分Verilog代码-The controller part of the Viterbi decoder in Verilog code
viterbi213
- （2,1,3）维特比译码器，具有一定纠错性能-Viterbi decoder
conv_dencode
- 基于quartus软件的卷积译码算法，应用维特比译码算法完成-Convolutional decoding algorithm based on the quartus software.complete the application of viterbi decoding algorithm
weitebi_notes
- 维特比译码 ，说明比较详细， 用于卷积的译码，很不错-Viterbi decoding, a more detailed descr iption
Enc_With_Punc---2011-11-28-v3.0
- Viterbi 译码打孔和去打孔代码, ,VERILOG 代码，自己写的，包含时钟打孔，-Viterbi Decoder With Puncture and Depuncture， Verilog Code，clock puncture ,
viterbia
- 实现viterbi译码，通过比较最小汉明距来判别最佳路径，删除不必要的路径，最终找到最佳路径。-Implement viterbi decoding, by comparing the minimum hamming distance to distinguish the best path, delete unnecessary path, finally find the best path.
juanjima
- 关于MATLAB语言的卷积码的编码与维特比译码-About convolution coding MATLAB language code and Viterbi decoding
src_vtb
- 用verilog实现的维特比译码电路，可以实现维特比译码-With verilog realize Viterbi decoding circuit, Viterbi decoding can be achieved
verilog-juanjima
- 卷积码是一种重要的前向纠错信道编码方式，其纠错性能常常优于分组码，且(2,1,7)卷积码已应用于现代卫星通信系统中。Viterbi译码算法能最大限度地发挥卷积码的优异性能。这里采用Verilog HDL语言设计出(2,1,7)卷积码的编码器模块和基于Viterbi算法的译码器模块，译码器采用全并行结构，译码速度快-Convolutional code is an important forward error correction channel coding method, and
viterbi_soft
- 维特比译码器，调用IP核，软判决输入，开发平台Xilinx Spartan-6系列FPGA-viterbi decoder, using IP core resource, soft decision input,develop platform is Xilinx Spartan-6 series FPGA