搜索资源列表
MEGA128_CRC16
- ATMEGA128应用CRC16的代码,并且突出了初始值和异或值参数-ATMEGA128 CYXLIC REDUNDANCY application code, and highlights the initial value and XOR parameter
fet110_1
- //*** *** *** *** *** *** *** * // MSP-FET430x110 Demo - Software Toggle P1.0 // // Descr iption: Toggle P1.0 by xor ing P1.0 inside of a software loop. // ACLK = n/a, MCLK = SMCLK = default DCO ~800k // // MSP430F1121 // --------------
crc32源码及资料
- CRC校验采用多项式编码方法。多项式乘除法运算过程与普通代数多项式的乘除法相同。多项式的加减法运算以2为模，加减时不进，错位，如同逻辑异或运算。-CRC polynomial used coding method. Polynomial multiply and divide computing process and the general polynomial algebra multiply and divide the same. Polynomial and subtract oper
OCMJ15X20D
- 支持文字与绘图两种混和显示模式 " "支持2 Page 显示模式(And, Or, Nor, Xor) "-LCD
ALU1
- ALU 指令格式(16位） op DR SR fun 0--3 4—7 8--11 12--15 指令类 OP码 指令 FUN 功能描述 控制 0000 NOP 0000 空指令 HLT 0001 停机 有条件跳转 0010 JZ 0000 Z=1，跳转 JC 0001 C=1，跳转 JNC 0010 C=0，跳转 JNZ 0100 Z=0，跳转 Jump 0101 无条件跳转 LOAD 001
CalcCRC
- CalcCRC8 The CalcCRC8 is used to append an eight-bit CRC to the message. A successful CRC check results in returning a 0. Implementation: This CRC will be using the CRC-16/CITT protocol. A 16-bit wide non-reflected code that starts initially
RISC-CPU
- 用FPGA实现一个简易的CPU，采用精简指令集结构，每一条指令有16bit，高三位为指令操作数，后13位为地址，该CPU能实现8种指令操作，分别有HLT（空一个中期）ADD（相加操作）SKZ（为零跳过）AND（相与操作）XOR（异或操作）LDA（读数据）STO（写数据）JMP（无条件跳转指令）。cpu包括8个部件，分别为时钟发生器、指令寄存器、累加器、算术逻辑单元、数据控制器、状态控制器、程序计数器、地址多路器，各个部件之间的相互操作关系由状态控制器来控制，程序指令存放在初始rom中，本例程存放
chuankoujingling
- 所有的单片机都会涉及到232 或者485通讯,而通讯中又不可避免的出现错误.本例就给出了一个现成的校验软件.完成串口通讯,并且进行crc,累加和,异或和等效验结果-All of the single-chip will be 232 or 485 relating to communications, and communications also inevitable error. In this case on a given off-the-shelf software validatio
DE2_VGA3
- The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA is a clump formed by sticky particles adhering to an existing structure. In this design, we start with one pixel at the center of the screen and allow
alu
- 用VHDL实现8种运算的ALU，带鱼不带符号的加减乘除，与或异或和求反-Use VHDL to achieve the eight kinds of computing ALU, hairtail unsigned addition and subtraction, multiplication and division, with or XOR and seek anti-
mega48_HEF4070_lcddriver
- MEGA48与异或门驱动LCD+红外控制原理图 eagle编译-MEGA48 XOR gate driver with LCD+ Infrared control schematic compiler eagle
ALU
- 在Xilinx7.1平台下编写的ALU代码，可以实现五位加法、减法、与、异或四种运算！-Xilinx7.1 platform in the preparation of the ALU code, can be achieved five adder, subtraction, and, four computing XOR!
b
- 利用神经网络BP算法求解异或问题的源代码-The use of neural network BP algorithm XOR problem s source code
disanci
- 5位的操作数X和Y输入后暂存在寄存器A和B中，两位的操作控制码control暂存在寄存器C中，按照control码的不同，分布实现下列操作： 00控制X+Y 01控制X-Y 10控制X and Y 11控制 X xor Y 运算结果暂存在寄存器D中，然后输出。 -5 of the operand X and Y after the temporary importation of A and B in the register, the two operational c
xor
- 异或门的FPGA实现的verilog代码-xor FPGA realization of the verilog code
my_xor
- 异或门，Verilog实现，包含实验说明文档。-XOR gate, Verilog implementation, including test documentation.
XOR
- vhdl code for XOR gate
xor
- Xor gate implementation in vhdl.
xor
- implementation of XOR gate in VHDL with rtl view and simulations
XOR-serial-communication-simulation
- vb mcu51 proteus 串口异或通信仿真,自己的源程序能用.-XOR vb mcu51 proteus serial communication simulation, their source can be used.