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24-bit-binary-to-4-byte-BCD
- 24-bit binary to 4-byte BCD for 8051 microcontroller
NO.10-BCD-decoding-digital
- 《单片机C语言程序设计实训100例——基于8051+Proteus仿真》案例压缩包 第 02 篇 第 02 篇 硬件应用 10 BCD译码数码管显示数字-" Microcontroller C Programming Language Training 100 cases- based on 8051+ Proteus simulation," Case No. 02 cabinet hardware section 02 application 10 BCD de
BCD_add
- BCD全加器，用QuartuesII 开发的源码，包括工程文件，下载就能用的，在DE2-70上直接使用。-BCD full adder, with QuartuesII source development, including the project file, download will be able to use in directly on the DE2-70.
BCD2LED
- bcd to led decoder file-bcd to led decoder file..
bcd
- 星研版 单片机实验 BCD码双字节乘法 小键盘输入-Star research version of the chip experiment double-byte BCD code multiplication
BCD
- 51单片机实现，用汇编实现BCD码的十进制加法，低位不带进位加法，高位带进位加法-51 assembly to achieve BCD coded decimal addition
A-Novel-Reversible-BCD-Adder-For-Nanotechnology-B
- A Novel Reversible BCD Adder For Nanotechnology Based System
Design-and-Optimization-of-Reversible-BCD-Adder-S
- Design and Optimization of Reversible BCD Adder-Subtractor Circuit
Design-of-Optimized-Reversible-BCD-Adder-Subtract
- Design of Optimized Reversible BCD Adder-Subtractor 229
Optimized-reversible-BCD-adder-using-new
- Optimized reversible BCD adder using new
bcd-7seg
- Create a VHDL code representation of a BCD-to-Seven segment decoder. bcd 7 segment
BCD-adder
- 用VHDL语言设计一个BCD码加法器，输入A[3..0]、B[3..0],输出为SUM[4..0]。-bcd adder
prog-16-Hex-to-BCD
- 8051 source code to convert Hex to BCD
BCD-autoplus
- 利用Verilog HDL语言，编写一个2为BCD码加法器程序，并在DE2板是实现功能的运用。-Auto plus
BCD_to_7SEG
- BCD to 7-segment decoder
Double-byte-adder-BCD-code
- 将以片内RAM 30H 为起始地址的双字节BCD码 30H和40H为起始地址的双字节BCD码相加，结果放在50H和51H中，程序结束-Will be in RAM30H for the starting address of the double byte BCD code 30H and 40H for the starting address of the double byte BCD code phase, results in 50H and 51H, end of program.
binary-to-BCD-code-converter
- 4位二进制到BCD码转换器 经验证没有错误 在quartus 9.0 的环境下运行 -The four binary to BCD code converter proven there are no errors in the running quartus 9.0 environment
BCD-youxianbianma
- 优先编码器，通过VHDL语言实现BCD优先编码的功能-Priority encoder BCD priority encoder function through VHDL language
BCD-counter
- 一个2位的BCD码十进制加法计数器电路，输入为时钟信号CLK，进位 输入信号CIN，每个BCD码十进制加法计数器的输出信号为D、C、B、A和进位输出信号COUT，输入时钟信号CLK用固定时钟，进位输入信号CIN. -A 2-bit BCD code decimal adder counter circuit input as the clock signal CLK, a carry input signal CIN, D, C, B, A, and the carry output s
bcd-decimal
- bcd to decimal verilog code