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new_BCHandRS
- 我好不容易找到的BCH编解码的FPGA的程序。欢迎大家使用- I found with great difficulty BCH arranges the decoding the FPGA procedure. Welcome everybody use
vhdlchufaqi
- 这是一个基于VHDL语言的bch除法器，其功能就是实现二进制除法，采用移位的方式进行-This is based on VHDL language bch divider, its function is to achieve binary division, the way by shift
brcm_nand_ecc
- BRCM 平台ECC算法(C语言),该算法可以产生3字节的ECC,每512字节一组-BRCM NAND Flesh Memory ECC Encoder (Hamming code and BCH codes)
syndrome
- the first step og bch code decoder part. syndrome generator
bch_dec_enc_dcd_latest.tar
- BCH译码器设计源代码，它能实现对两位错误的纠正。这是最新版本。-The BCH decoder design source code, it can achieve the two error correction. This is the latest version.
bchbianma
- 基于pic单片机系列的BCH(15,7)编码文件,-code of c for bch
bch_dec
- BCH编解码 Features : – allows to correct up to 2 errors. – supports 16/32/64/128 bit memories (typical memory word sizes). – operates on complete memory words in a single cycle. – pure combinational logic design-The double error correcting (DE
new_rs_erasures
- ECC算法C代码，用于flash控制器等相关的一些纠错功能。-ECC algorith C code: include read-solomn and BCH code, especially for flash controller.
BCH_EN
- 基于FPGA的GPS/BD信号发生器中BCH编码发生器模块，使用verilog编写- FPGA-based GPS/BD signal generator BCH code generator module, using verilog write
rs_decoder_31_19_6_latest.tar
- 31.19解码器- RS code is the BCH code of multi-systerm, after a long time of development, the theory and technology of RS code has been rather mature that it can rectify burst error and random error at the same time, especially burst error. It is widel
decoder
- bch decoder 3072 3240 vhdl source code with ise software
bch3
- BCH编码、译码器，支持参数化使用，从多项式生成、编码到解码，全都有。-BCH encoder decoder
chpt5
- This presentation discusses BCH codes which are a certain type of error correction codes that is extensively used in Digital Communications. The understanding of BCH codes and its generation requires a good background in abstract algebra and polynomi
bch_dec_enc_dcd
- 关于BCH的编码器和译码器，可实现16位，32位，64位，128位的编码和译码纠错，2位纠错，Verilog实现-On the BCH encoder and decoder, can achieve 16-bit, 32-bit, 64-bit, 128-bit encoding and decoding error correction, 2-bit error correction, Verilog implementation
bch_verilog-master
- BCH code Open Source
2bit_ecc
- 基于BCH码的ECC纠错算法，可纠错2位错误码，供参考(Based on BCH code ECC error correction algorithm, two error codes can be corrected for reference.)