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stm32_Count_cepin
- 采用stm32内部TIM编程 实现对输入信号的计数测频 可测0HZ—65536HZ的频率-TIM programming using the internal stm32 Count the input signal to achieve frequency measurement Can be measured 0HZ-65536HZ frequency
count
- 用VHDL实现一个四位十进制计数器来进行计数,并且仿真通过-To use VHDL to achieve a 4 decimal counter to count, and the simulation through the
7seg
- 利用8051控制8个七段显示器,采用分时多任务方式显示,显示内容为时钟计数。-8051 to control the use of paragraph 8 displays, using time-sharing multi-task display, showing the content for the clock count.
up_down_counter
- 32 bit up/down counter with count enable based on altera fpga
hongwai
- 本系统主要用于旅游景点记录游客人数,并限制旅客的流量。采用红外传感器通过检测人体红外并对通过人数进行计数,通过红外对管将检测到的数据发送至单片机,单片机处理后送至数码管显示,数码管显示的数据即为通过的人数,并通过设定值限制旅客数量。当游客超量是系统将给出相应的提示,禁止游客再进入。以更好的保护旅游景点的生态环境。-This system is mainly used for tourist attractions recording the number of visitors and lim
count
- 实现各种计数器的vhdl的实现方法,经过验证-many count
COUNT
- 设计一个最大分频为225的分频器,将50MHz时钟作为输入。分频器可以通过计数器来实现,通过一个25位的计数器,然后在最后一位输出,则产生了一个最大分频为225的分频器。-Design a maximum frequency divider 225, the 50MHz clock as input. Divider can be achieved through the counter, through a 25-bit counter, and then the last one out,
6-BIT-count
- 利用AT89S51单片机的T0、T1的定时计数器功能,来完成对输入的信号进行频率计数,计数的频率结果通过8位动态数码管显示出来。要求能够对0-250KHZ的信号频率进行准确计数,计数误差不超过±1HZ。-AT89S51 MCU using T0, T1 of the timer counter functions, to complete the input signal frequency count, counting the frequency of results by 8-bit dy
count
- 对脉冲进行计数,要求脉冲频率不得超过50HZ(C51源码)-Pulse count, pulse frequency required no more than 50HZ (C51 source)
Codes
- this code is for adc and count down timer on 8051 microcntorller
COUNT
- 利用8088/86外接8253可编程定时器/计数器,可以实现对外部事件进行计数。设置断点读回计数器的值。-8253 by 8088/86 external programmable timer/counter can count external events. Breakpoint counter value read back.
the-count-of-PC
- 基于单片机的计数器、频率计之类的文件,希望对大家有所帮助。-it based on the count of the PC,I hope it can help you!
Four-controllable-counter
- 功能是(用Verilog语言的,内有比较详细的注释): (1)计数器的功能是从0到9999计数,并能以十进制数的形式在七段数码管上显示出来(包括七段数码管显示模块). (2)该计数器有一个1个nclr和一个adj_plus端,在控制信号的作用下(见下表),计数器具有复位、增或减计数、暂停的功能。编写以上的程序的完整模块. 计数器的功能表 nclr adj_minus 功 能 0 0 复位为0 0 1 递增计数 1 0 递减计数 1 1 暂停计数 -Functi
taxi-count-price
- 这篇论文的实用性很强,对于实际的出租车的需要而来设计的,对于将来开发更完善的出租车计费功能有很大的帮助-the paper have much praticatity,to design the paper for real taxi need,it is very useful for design more system to taxi count price
Perak-count-implementation-
- 矩阵键盘计数执行霹雳灯,带仿真的图,很不错的哦!-Perak count implementation matrix keyboard light, with a simulation of the map, very good oh!
count
- 开发环境为KEIL+PROTEUS 实现6位频率计数,6位共阴数码管显示。带有仿真图和源代码-KEIL+ PROTEUS development environment for the realization of six frequency count, six common cathode LED display. Diagrams and source code with a simulation
count
- 吉大短学期CPLD实习程序 可逆10 进制计数器,用1 位拨码开关进行加减控制:输入为0 时进行加计数,当输入为1 时进行减计数;用1 位拨码开关进行同步清零控制:输入为0 时清零,输入为1时正常计数。计数结果用数码管显示-Chittagong short term internship program CPLD reversible binary counter 10, with an addition and subtraction DIP switch control: when th
count
- 1.用VHDL设计具有清除端、使能端,计数范围为0~999的计数器,输出为8421BCD码; 2.用VHDL设计十进制计数器(BCD_CNT)模块、七段显示译码器电路(BEC_LED)模块和分时总线切换电路(SCAN)模块。 3.用MAX+plusⅡ进行时序仿真。 -1. VHDL design with a clear end to end so that the count range of 0 to 999 in the counter, the output is 8421B
Use-the-STM32-timer-
- 使用STM32的定时器进行输入脉冲的计数代码-Use the STM32 timer carries on the count of input pulses code
count
- 模可变计数器设计 (1) 设计设置一位控制位M,要求M=0:模23计数;M=1:模109计数。 (2) 计数结果用静态数码管显示,显示BCD码。 (3) 给出此项设计的仿真波形 -Variable counter mold design (1) design set a control bit M, requires M = 0: mode 23 count M = 1: mode 109 count. (2) counts with static digital dis