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模型机的分析和设计
- 通过对计算机的组织与结构的分析,综合运用所学计算机原理知识,设计并实现较为完整的计算机,即模型机。它可以完成一般计算机的最基础功能,具备16条基本指令,以及4种寻址方式等。并且,计算机数据通路的控制将由微程序控制器来完成,CPU从内存中取出一条机器指令到指令执行结束的一个指令周期全部由微指令组成的序列来完成,即一条机器指令对应一个微程序。设计过程包括四个部分:㈠模型机硬件组成分析;㈡指令系统设计;㈢微程序设计;㈣上机实现,示范程序。- Through to the computer organi
cpu
- 关于FPGA的CPU的设计,可以看一下,大家讨论学习一下啊-The CPU on the FPGA design, you can see, we discussed learning about ah
cpu
- cpu的vhdl设计实现加法减法乘法运算-cpu VHDL Design and Implementation of multiplication addition subtraction
mipscpudesign
- cpu设计实例mips。MIPSI指令集32位CPU(1)MiniCore设计实例全32位操作,32个32位通用寄存器,所有指令和地址全为32位 (2)静态流水线(3~5级) (3)Forwarding技术 (4)片内L1 Cache,指令、数据各4KByte,硬件初始化 (5)没有TLB,但系统控制协处理器(CP0)具有除页面映射外的全部功能 -cpu design example mips. MIPSI instruction set 32-bit CPU (1)
n2cpu_nii51004
- NIOSII CPU设计实例,包括AVOLON总线特点和时序要求-NIOSII CPU design examples, including AVOLON bus characteristics and timing requirements
cpu
- 用VHDL语言设计简单的CPU,重点设计微操作代码,然后设计CPU各组成模块,最后根据设计的微操作设计微指令,验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the f
RISCCPU
- 简单的CPU设计流程PPT,用于教学目的,可综合的verilog HDL设计。-A simple CPU design process PPT, for teaching purposes, can be integrated verilog HDL design.
CPU
- 简单的cpu设计 实现简单功能 使用vhdl语言做的-vhdl cpu design
CPUdesign
- 计算机组成原理实验多时钟周期CPU设计,包含VHDL代码的设计,实验电路图,实验详细截图。-Computer component experiments designed more CPU clock cycles, including VHDL code design, test circuit, test detailed screenshots.
risc1200
- risc cpu设计源码,全部资料 欢迎下载-risc cpu core
cpu
- 设计以及基本的CPU,至少包括四个基本单元,控制单元,内部寄存器,ALU和指令集-The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program to verify its perf
CPU
- 利用VHDL语言 开发设计一个小型CPU -Development and design using VHDL, a small CPU
KD-CPU
- 计算机原理课程设计给予Verilog做的课题,丰富的指令支持,LOOP,TRAP、以及子程序调用等-Principles of curriculum design to do the computer issues a rich instruction support, LOOP, TRAP, and subroutine calls, etc.
CPU_data_path_design_is_very_simple
- 居于硬件描述语言的简单CPU设计,能够实现比较简单的数据传送处理功能,虽然功能简单,但只要搞懂了其中原理,对于大的系统就能够有依葫芦画瓢的强大效果。-Living in a simple CPU hardware descr iption language design, to achieve relatively simple data transfer processing functions, although the functionality is simple, but as lon
cpu
- 16位的CPU的VHDL程序~~还有附加的生成波形,可以应用于课程设计中-16-bit CPU, VHDL ~ ~ There are additional procedures for generating waveforms, can be applied to curriculum design
danzhouqiCPU
- VHDL单周期CPU设计,基于Quartus II 开发平台-VHDL single-cycle CPU design, Quartus II development platform based on
cpu
- 8位CISC模型计算机设计,包括加减法存储输出的运算-8-bit CISC model of computer design, including the addition and subtraction operations stored output
CPU
- 多周期CPU设计,使用Verilog HDL语言编程,实现MIPS的指令系统。-CPU design with verilog hdl language.Instructions from MIPS.Something in detial is not perfect.
cpu
- 组成原理实验~简单cpu的设计~基于EDA环境下的-Composition Theory Experiment Design ~ ~ Simple cpu EDA environment based on
cpu
- 设计一个简化的处理器(字长8位),并使其与内存MEM连接,协调工作。用VHDL以RTL风格描述。该处理器当前执行的指令存放在指令寄存器IR中。处理器的指令仅算逻指令和访问内存指令)。-Design a simplified processor (8-bit word length), and connect it with the memory MEM, and coordination. Described with VHDL in RTL style. The processor is c