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husw
- 用VHDL语言设计维特比 解码器 是VHDL原代码用ModelSim XE III 6.3c软件实现仿真-Language Design with VHDL Viterbi decoder is the VHDL source code with ModelSim XE III 6.3c software simulation
dct2
- 这个是一个基于FPGA的数字图像的整数DCT变换程序,程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
dct2
- discrete cosine transforms for embedded systems
DCT2
- 2 维 DCT的VHDL实现以及 测试代码 , -2-D DCT of the VHDL implementation and test code