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DDC_DUC
- 数字上下变频FPGA设计的详细介绍资料,还是中文的。很舍不得上传的哦。-FPGA digital down conversion design detailed information, or Chinese. Oh, very reluctant to upload.
verilog_FPGA_DDC
- 这是一个用verilog HDL实现的实现数字下变频的源代码。-This is a verilog HDL used to achieve the realization of digital down conversion of the source code.
cic
- 在MATLAB2007A/SIMULINK环境下用DSP BUILDER8.0实现了五级CIC,解决了溢出问题。生成了可用的VHDL文件。- DSP BUILDER8.0 A 5 stages CIC filer is realized in MATLAB2007A/SIMULINK by using DSP Builder 8.0.The overflow problem is resulved.Useful VHDL files are generated at last.
if-receiver
- 中频数字接收机设计与实现 对中频数字接收机方案的可行性作了分析,并通过系统仿真工具SystemView对A/D,数字下变频(DDC)及AM、FM等调制信号的软件解调作了仿真。-Design and implementation of a digital intermediate frequency receiver