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ZHAO9B
- 是实现FIR滤波器的主要功能。利用C和汇编实现的。包含了延时、主频、头文件、主函数、向量函数、及SIAN函数-FIR filter is the main function. Using C and compiled achieve. Includes delay, speed, the first paper, the main function, vector function, and function Brasileiro
LMS_filter
- verilog HDL 写的LMS滤波器-LMS filter using verilog HDL language
dsp
- dsp实验教程，包括高通，低通，带通滤波器，以及一些延时程序代码，TMS320C54x指令表-dsp test tutorials, including high-pass, low pass, band pass filter, and some delay code, TMS320C54x Instruction List
IIR_FILTER
- 无限冲击响应滤波器（ llR ）算法 由于系统对序列施加的算法，是由加法、延时和常系数乘三种基本运算的组合，所以可以用不同结构的数字滤波器来实现而不影响系统总的传输函数。-Infinite impulse response filter (llR) algorithm because the system imposed on the sequence of algorithms, are by adder, delay and the constant coefficients by a
3_3_mean_diltter(ALU)
- 3*3均值滤波的VHDL语言实现的工程，对红外图像进行有效的去噪处理。这是其中的ALU模块，专门用来测试其延迟状况的模块。-3* 3 mean filter VHDL language works effectively on the infrared image denoising. This is one of the ALU module, designed to test the status of the module delay.
Improving-the-Active-Power-Filter-Performance
- Abstract—In this paper a current reference generation method for a voltage source shunt active power filter is examined. The proposed method improves the harmonic filtering by compensating the delays in the system. In stationary operating poi
51-practical-subroutine-(assembly)
- 第1章 二进制定点数运算 第2章 二进制浮点数运算 第3章 十进制（BCD码）数运算 第4章 代码转换 第5章 数据变换 第6章 排序、查找和非线性算法 第7章 数学函数 第8章 树和图 第9章 延时与跳转控制 第10章 人机交互接口 第11章 单片机测控接口 第12章 51单片机内部资源编程实例 第13章 单片机数据传输接口 第14章 波形发生与控制实例 第15章 C51单片机软件抗干扰和数字滤波-Chapter 1 dot binary
cicfilter
- 基于多速率信号处理原理,设计了用于下变频的CIC抽取滤波器,由于CIC滤波器结构只用到加法器和延迟器,没有乘法器,很适合用FPGA来实现-This article describes the design of a CIC filter based on the signal processing theory.Because of its structure only using the adder and the delay devices without multiplier,it is
fir
- 串行乘法累加结构的FIR滤波器电路，FIR的滤波过程就是一个信号逐级延迟的过程-Serial multiply-accumulate structure of the FIR filter circuit, the FIR filtering process is a signal to the process step by step delay
ADSP
- 设x(n) = x1(n) + x2(n)，x1(n)是窄带信号，定义为x1(n) = sin(0.05πn +φ)，φ是在[0, 2π)区间上均匀分布的随机相位。x2(n)是宽带信号，它由一个零均值、方差为1的白噪声信号e(n)激励一个线性滤波器而产生，其差分方程为x2(n) = e(n) + 2e(n-1) + e(n-2)。 (1)计算x1(n)和x2(n)各自的自相关函数，并画出其函数图形。据此选择合适的延时，以实现谱线增强。 (2)产生一个x(n)序列。选择合适的μ
FPGA_CIC
- 用Count计数法实现5级CIC滤波器，能够提前或者延迟一个周期采样。能综合-Implementation level 5 CIC filter with Count counting method, one can advance or delay the sampling period.
32FIRVHDL
- 基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器，运行速度更快，占用内存更小，延迟更小。 -32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.
iir_pipe
- 此程序应用了流水线技术来实现IIR滤波器，它是由一个非递归部分和一个具有延迟为2和系数为9/16的递归部分构成。-The procedure applied to the pipeline techniques to achieve an IIR filter, which consists of a non-recursive portion and having a delay of 2 and a coefficient of the recursive part 9/16 constit
sinclvboqi
- 该程序实现了sinc滤波器的分数延迟速率变换器，其中R = 0.75.-The program implements a sinc filter fractional delay rate converter, where R = 0.75.
MCS51
- 二进制定点数运算/二进制浮点数运算/十进制（BCD码）数运算/代码转换/数据变换/排序、查找和非线性算法/数学函数/树和图/ 延时与跳转控制/人机交互接口/单片机测控接口/51单片机内部资源编程实例/单片机数据传输接口/波形发生与控制实例/C51单片机软件抗干扰和数字滤波-Binary fixed-point number operations/binary floating-point operations/decimal (BCD) operation/sorting/code conver
Dynamic-Noise-Reduction-Algorithm
- n this paper, a new dynamic noise reduction algorithm is proposed based on time-variety filter (TVF), which can be implemented in both time and modified discrete cosine transform (MDCT) domain. In time domain, an IIR filter with changeable ba
vbnxy
- Based on the time delay estimation of power spectrum, The final weight matrix is ??the filter coefficient, cordic matlab simulation algorithm.