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DSP_h264_VariableBlockSize
- 這是用verilog HDL實現H.264可變block大小的源碼。為了使其能在FPGA上運作，還加入了我自己的改善。-A verilog HDL code for H.264 with variable block size and my own improvement.
nova_latest.tar
- VERILOG source code of a H.264 baseline decoder.
hardh264-src.tar
- VhDl code for low-power design of h.264 system architecture
bb74300fc549
- vhdl code low-power design of h.264 system architecture
H.264-VHDL
- h.264的VHDL编码，附带文档，绝对有用-h.264 the VHDL code, the documentation that came with absolutely useful