搜索资源列表
tx_inter
- Convolutional Interleaver Encoder-convolutional Interleaver Encoder
cf_interleaver2
- interleaver即交织器，里面包含有C,VHDL,VRILOG HDL三种语言写的交织器, 包括各种各样的组合达六七十种，描写详尽，是一个难得的学习交织器的材料 -interleaver that interleaver, which contains C, VHDL, VRILOG HDL three languages to write the interleaver, including a variety of combinations to depend species,
suij
- 硬件编程实现伪随机交织器和随机交织器，应用环境Quartus II5.0-hardware programming pseudo-random interleaver and random interleaver, application environment Quartus II5.0
turbo-interleaver
- 基于FPGA的Turbo码交织器的设计与实现 比较实用
INTERLEAVER
- 我的毕设用到的，交织编码，可以得到应用，用单片机实现。
interleaver-vhdl.rar
- VHDL编写的基于FPGA的4-8交织器代码，有需要的下来看看,4-8 prepared VHDL code interleaver
interweave_1
- 用VHDL语言编写的实现交织编码和解交织功能的代码。交织采用按行写入，按列读出的方法实现。主要包括：信源信号产生（20位的m序列），交织器，解交织器。为实现流水线的操作，采用了两个交织器和两个解交织器，当一个写入数据的时候，另一个读出数据。-Implementation using VHDL language features Interleaved Coded deinterleave code. Intertwined with by line write, read out by colu
4_31
- 这是一个交织器/解交织器的FPGA实现，虽然交织器的功能简单，但是其实现比较复杂-This is an interleaver/de-interleaver to achieve the FPGA, although the function of interleaver simple, but its more complicated to achieve
interleaver
- 通信系统中的数据交织程序The data communication system procedures intertwined-The data communication system procedures intertwined The data communication system procedures intertwined
interleaver
- 这是一个用VHDL编写的交织器程序,使用交织器能够使干扰由突发变成随机化-This is a prepared using VHDL interleaver, the use of interleaver enables interference by the sudden randomized into
interleaver
- 实现矩阵交织的Veriog源代码，内含有modelsim测试文件-Veriog interwoven matrix of the realization of the source code files containing the test modelsim
Interleaver
- 自己做的交织器，里面包含了交织器的源程序，和交织器的仿真电路文件等等。。。调试后，实现结果正确-Do their own interleaver, which contains the source code interleaver and interleaver circuit simulation files and so on. . . After commissioning, to achieve the right results
jiaozhiqi
- 是Turbo码交织器的VHDL设计与仿真的文献-Is the Turbo Code Interleaver Design and Simulation of VHDL literature
bpsk
- 基于FPGA的BPSK数字调制器的实现，对于学习通信专业的人应该有些帮助-FPGA-Based Digital Modulator BPSK, for people to learn communication professional should be some help
interleaver
- interleaver for wi max phy
turbo
- Turbo code simulation. This code can be compiled on all platforms. The interleaver size is 10000. SNR can be varied according to user s need. However, each time SNR is changed, the code must be recompiled.-Turbo code simulation. This code
interleaver
- 交织编码器的verilog代码实现，此外有testbench和波形。-the verilog code for the interleave encoder, with the testbench code and waveform screen print.
jiaozhijiejiaozhi
- VHDL代码完成行列交织与解交织的功能实现-the realization of interleaver on VHDL language
interleaver
- vhdl code for interleaver
interleaver
- interleaver,Lte channel etimation,its a matlab scr ipt file with an extension .m