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sanfenpin
- 这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside
counter
- 实现任意奇数偶数分频的 模块 ，而且占空比为50 ，本人一直在用，很好用！-Implementation of arbitrary even-numbered odd-numbered frequency sub-module
odd
- 6分频的一个工程文件 altera 分配计数器的源码-6 frequency distribution of a project file counter source altera
ass1_2_hamming
- Hamming codes are a class of binary linear codes. They can detect up to two simultaneous bit errors, and correct single-bit errors. In particular, a single-error-correcting and double error detecting variant commonly referred to SECDED.-a) Develop a
fenpinqi-VerilogHDL
- 各种分频器的VerilogHDL语言编写，有通过计数器实现的奇分频，偶分频，任意分频-Various divider VerilogHDL language, there is achieved through the odd frequency counter, even frequency, any frequency
7seg-counter
- up ,down ,odd and even counter using 7segment ,lcd and 80c535 ic
state10
- VHDL 三、五奇数模计数器 占空比0.5-VHDL counter odd mode duty cycle 0.5
divider
- 使用模为2N+1的计数器,让输出时钟在X-1(X在0到2N-1之间)和2N时各翻转一次,则可得到奇数分频器,但是占空比并不是50 -The use of modulo 2N+1 counter, let the output clock in the X-1 (X between 0 and 2N-1) and 2N of the turning once, then can get the odd divider, but the duty ratio is not 50