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ram
- 本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ens
ram
- RAM， Random-access memory，Verilog code
ref-ddr-sdram-verilog.zip
- sdram的verilog的源码实现,sdram verilog source code realizes
DSP-533M-ddr2RAM4C6455.rar
- C6455 的 533M DDR2 ram 控制程序。完整代码，可以直接使用。,533M DDR2 ram the C6455 control procedures. Integrity of the code, can be used directly.
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
CODE.rar
- AHB总线下的slave ram的verilog代码,AHB bus slave ram verilog
LPC2103-IAR
- LPC2103-IAR例程，NXPLPC2103 arm7处理器实验代码-LPC2103-IAR routines, NXPLPC2103 arm7 processor test code
sdram_vhd_134
- Xilinx Sdram控制器VHDL源代码-Sound code of Xilinx Sdram Controller based on VHDL
fifo的vhdl原代码
- 本文为verilog的源代码-In this paper, the source code for Verilog
sdr_c_trl_verilog
- SDRAM 控制器的Verilog代码 经过综合验证过的.无截压密码-SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password
ram
- ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
ram32b
- VHDL code for 32 byte RAM
RAM
- 用VHDL编写一个字长16位，容量128B的RAM控制实现程序，并进行设计综合和功能模拟 。含源程序，及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental
ram
- 用FPGA做的RAM，源码，调试通过，有工程-FPGA to do with RAM, source code, debugging through, there are works
RAM
- Ram with 8 bits implemented in vhdl verilog code
RAM
- ram code in VHDL with its test code
ram-rom-VerilogHDL
- 利用Verilog编写的各种RAM ROM的代码以及他们的测试模块-Prepared using a variety of RAM ROM Verilog code and their test module
ram
- verilog 编写的ram代码，开发环境为quartus-ram write verilog code development environment for quartus
ram
- hi this is ram code in vhdl
verilog-code
- 都是verilog代码：多路选择器代码，储存器代码，时钟分频器代码，串并转换电路代码，香农扩展运算代码，ram代码。-MUX code and REGISTER code clock divider code string conversion circuit code, Shannon extended op code, the ram code.