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通用存储器包括各种类型存储器的VHDL描述
- 通用存储器包括各种类型存储器的VHDL描述, 如FIFO,双口RAM等VHDL代码库
TMS320F2812读写外部RAM的C语言例程
- TMS320F2812读写外部RAM的C语言例程,TMS320F2812读写外部RAM的C语言例程,TMS320F2812 external RAM read and write the C language routines, TMS320F2812 external RAM read and write the C language routines
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
dual_port_ram
- 实现双口ram的读写功能,并含有测试文件,已经经过方针验证,很好用的-the writing and reading to the dual port ram ,good
256.16-RAM
- VHDL语言编写,实现256×16RAM块功能,稍加修改即可改变RAM块的容量-VHDL language, achieving 256 ×16RAM block .A little change can change the capacity of the block RAM
ram
- 一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
ram_Test
- RAM读写控制器,用verilog实现的简单易懂的RAMROMsram控制核-Controller RAM read and write, using verilog implementation of easy-to-understand control of nuclear RAMROMsram
RAM
- 双口RAM与PXI总线接口设计,包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
ramvhdllib_06
- The Free IP Project VHDL Free-RAM Core-The Free IP ProjectVHDL Free-RAM Core
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
ram
- 存储器模块生成,采用16位数据总线,5位读写地址总线,异步清零!-Memory modules generated, using 16-bit data bus, 5 to read and write address bus, asynchronous Clear!
VHDL
- 采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下: 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道(ch1、ch2、ch3、ch4),每个通道配备100 Bytes的RAM,当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出,输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道,DISPLAY
VHDL
- 常见的输入输出及存储器件(ram及fifo)vhdl实现-The vhdl source codes of ram,fifo.
RAM
- 用VerilogHDL写的ram程序,对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
ram
- RAM存储器的源程序,可以试一试,看看好不好用-OH
ram
- 一些设用vhdl设计ram的资料,请下载看看吧-Vhdl design with a number of ram-based information, please download to see it
ram
- 基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
RAM
- 这是个双端口双端口ram的定义,当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
RAM
- 用VHDL编写一个字长16位,容量128B的RAM控制实现程序,并进行设计综合和功能模拟 。含源程序,及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental