搜索资源列表
PCI_DG
- PCI设计指南，xilinx出版，rev 3.0-PCI Design Guide, xilinx published, rev 3.0
stopwatch
- 基于Xilinx Spartan3E的秒表，能实现计时两次的功能-Based on the Xilinx Spartan3E stopwatch, time to achieve the functions of the two
lcd_test
- Xilinx Spartan-3E实验板上基于verilog控制lcd屏幕A到Z反复轮转显示。-Xilinx Spartan-3E verilog based test control board lcd screen A to Z repeated rotary display.
xilinxise10.1edk
- Xilinx ise10.1 edk 使详解 xilinx培训资料 中文翻译过的华为培训资料 以Spartan3为例-Xilinx ise10.1 edk Xiangjie xilinx training materials to the Chinese translated example of Huawei training materials to Spartan3
VGA
- Xilinx sparten3E VGA显示控制程序-Xilinx sparten3E VDisplay and control procedures
xilinxusb
- xilinx USB 下载线资料与程序, -xilinx USB download cable data and procedures, many money to buy the
XILINX_ML505_REVA_ASSY_110306
- XILINX公司的ML505开发板参考设计源码打包-XILINX
xilnx_sata
- xilinx 的sata解决方案，已对其中内容作了修改，可实现综合-sata the xilinx solutions have been made to amend the contents of which can be used
leds
- xilinx SPARTAN3E 下的led七段数码管显示程序，基于SDK平台。-xilinx SPARTAN3E led under the seven-segment LED display program, based on SDK platform.
Xilinx_FPGA_tutorial
- Xilinx ISE软件使用实例 Foundation入门 参数编辑 设计管理器/设计流程向导 FPGA editor 底层编辑器(floorplanner) 硬件调试器（hardware debuger) JTAG编程（JTAG Programmer) LogiBLOX Xilinx FPGA设计进阶 FPGAexpress的使用 Vertex器件结构 层次设计和同步电路设计 HDL设
oc_mkjpeg
- Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.-Pure hardware JPEG Encoder design.
eetop.cn_licgen_ise_13.1
- this the license genarator for xilinx ISE DESIGN SUIT 13.1 -this is the license genarator for xilinx ISE DESIGN SUIT 13.1
Spartan6_SP605
- XILINX 高性能FPGA 系列spartan6 sp605开发板原理图，轻松实现FPGA内部LINUX系统。-xilinx high proformance FPGA serise spartan6 sp605 demo kit sch,relize linux system in fpga more easyly.
61EDA_C2194
- < xilinx ise 9.x fpga cpld设计指南>>, xilinx设计经典中的经典书籍,讲得非常全面.是fpga设计人员不可或缺的书籍-xilinx design classic of the classic books, put it very comprehensive. fpga design is an indispensable book
BlockRAM
- xilinx BlockRAM 级联，利用Xilinx原语（非IP Core），更大灵活性-xilinx BlockRAM cascade, using Xilinx primitive (non-IP Core), greater flexibility
micro.logic
- 16通道逻辑分析仪（xilinx XC3S50AN-4TQ144C +CY7C68013A-56PVXC）pcb图纸 使用altium 08打开-schdoc+pcbdoc
edk_ctt
- xiinx的edk开发的文档，看了这个文档，你可以找到所有xilinx EDK开发的相关文档。-xilinx edk development document,ISE10
rs232
- rs232 interface for xilinx spartan 3e
hdlc
- HDLC协议的VHDL源码。接收和发送模块，以及所用FIFO的IP核（Xilinx公司）。-The code of HDLC protocol.Receive and transmit module is contained.
xilinxPCB
- xilinx的Virtex_4开发板的参考布线和原理图-xilinx development board of reference of Virtex_4 wiring and schematic diagram