搜索资源列表
ARMCORE
- 用verilog语言实现的ARM7处理器的标准内核的源代码程序,nnARM, 具有很好的参考价值-using Verilog language of the standard ARM7 processor core source code procedures nnARM, who have a good reference value
sarm9beta
- arm9 架构简单core实现，可以综合，有实现步骤和说明，verilog代码编写。-arm9 core framework to achieve a simple, comprehensive, implementation steps and notes verilog code prepared.
8088verilog
- intel 8088 架构的verilog代码，可以综合下载，在fpga上实现8088调试。-intel 8088 verilog structure of the code can be integrated download, fpga achieved in 8088 debugging.
Core_arm
- ARM7的源代码，能够实现ARM7的基本功能，VHDL以及Verilog语言开发。
trafficlight_verilog
- verilog语言实现交通灯，farm road和highway的十字路口，若农场路上检测到车，高速路上交通灯由绿变黄变红，农场路交通灯变绿。农场路上绿灯时间有上限，而高速路上绿灯时间有下限。包含.v文件和测试用.vwf文件
arm7_core_design
- arm7内核的verilog代码，可以综合，虽有几条指令没有实现，但已实现的功能对理解arm体系结构已足够
mips_verilog.rar
- verilog语言实现的基于MIPS体系结构的微处理器程序，一个时钟周期执行一条指令。,verilog language MIPS-based microprocessor architecture, an implementation of a clock cycle instructions.
risc8
- PIC单片机的verilog实现，不记得在哪里下载的。源文件中应该有的。-PIC MCU Verilog realized, can not remember where to download. Source file should have.
risc
- 嵌入式risc处理器源码，包含设计文档，原理图，testbench，及外围接口，使用verilog实现。-Source embedded RISC processors, including design documents, schematics, testbench, and peripheral interfaces, the use of Verilog to achieve.
I2C
- IIC控制器的verilog实现，通过mcu接口对iic slave器件进行控制-IIC controller Verilog realize
vgactl9
- EPM240+IS61LV1024+VERILOG实现简单的VGA控制器,RGB各1bit,与AT91SAM7S64接口.-EPM240+ IS61LV1024+ VERILOG to achieve a simple VGA controller, RGB each 1bit, and AT91SAM7S64 interface.
5956447divider
- 基于srt-2算法，利用verilog实现16位定点无符号数除法器（除数、被除数均由16位整数和16位小数组成，商由32位整数和16位小数构成，余数由32位小数组成）-Based on srt-2 algorithm, using verilog to achieve 16-bit fixed-point unsigned divider (divisor, dividend by 16-bit integer and 16-bit decimal form, business from the
SCMIPS
- 使用verilog代码描述了一种简单的单周期MIPS处理器实现，并在ModelSim SE6.5c调试通过。-The verilog code describes a simple, single-cycle MIPS processor implementation, and debugging through in ModelSim SE6.5c,.
8051Verilog_code
- 8051内核的Verilog程序实现，完成普通的单片机8051内核功能.包含综合后文件和测试文件-The 8051 kernel Verilog program complete ordinary microcontroller 8051 kernel function. Contains comprehensive post files and test files
OpenMIPS_VerilogHDL_Study_v1.1
- 10天用verilog实现MIPS_cpu，内有清晰结构图。很好的cpu设计学习资料！-10 days with verilog achieve MIPS_cpu, within a clear structure diagram. Good cpu design learning materials!
MIPSCPU
- 这是verilog实现的MIPS多周期CPU在modelsim下面仿真通过-This is achieved verilog CPU MIPS multi-cycle simulation in modelsim below by
CPU
- 用Verilog实现的 哈佛结构的简单指令集CPU程序，由ALU、地址译码器、指令译码器等部分组成-Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.
verilog-CAN-protocol-realization
- CAN协议的verilog实现，欢迎大家下载-verilog CAN protocol realization, welcome to download
CPU-master
- 单周期CPU的Verilog源码实现，基于Vivado(Single cycle CPU Verilog source code implementation, based on Vivado)
vivado
- 用中规模MSI基本逻辑功能模块 实现关模比较器（要求分别使用中规模和语言实现）： 功能要求：它的输入是两个8位无符号二进制整数X和Y，以及一个控制信号S；输出信号为1个8位无符号二进制整数Z。输入输出关系为：当S=1时， Z=min(X,Y)；当S=0时， Z=max(X,Y)。(Modeling comparator is implemented by using basic logic function modules of medium-scale MSI (medium-scale an