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board123
- 1 本程序为DSK板的初始化过程。 2.当DSP的主时钟频率为50MHz时，计算锁定时间定时器PLLCOUNT的值，并修改相关程序。 3.将主时钟的频率分别设置为50MHz、20MHz、10MHz、5MHz，通过观察LED指示灯的闪动频率来验证程序运行是否正确。-a procedure for DSK board initialization process. 2. When DSP master clock frequency of 50MHz, calculation time lo
cf_sector_RW
- TI 5402 dsp芯片读写cf卡的源程序，经本人验证可用，稍做修改就能读写硬盘绝对扇区。代码注释很全，强烈推荐-TI 5402 dsp chip cf card literacy program, I can verify, minor changes can read and write disk absolute Sector. Notes of the entire code is strongly recommended
SDRAM
- DSPC6747的SDRAM测试代码，分别向SDRAM中法写入数值，返回输入结果，验证写入成功。-DSPC6747 test code for SDRAM, SDRAM, respectively, China and France to write the value, return type results, verify the write success.
Lab0503-FFT
- CCS 3.3 中验证正确FFT算法。编程语言：C语言。-CCS 3.3 to verify the correct FFT algorithm. Programming Language: C language.
AD
- TMS320VC5502的AD转换验证程序，我验证过了！-TMS320VC5502 the AD conversion verification process, I had to verify!
FFT
- TMS320VC5502的FFT算法程序验证，我验证过了！-TMS320VC5502 procedures to verify the FFT algorithm, I tested a!
DC_Motor
- TMS320VC5502的直流电机驱动程序验证，我验证过了！-TMS320VC5502 the DC Motor Driver Verifier, I had to verify!
UARTONCHIP
- TMS320VC5502的外部串口通信程序验证，我验证过了！-TMS320VC5502 external serial communication procedures to verify, I had to verify!
FLASH
- 该程序用于对C6416开发板中FLASH的读写是否成功的验证 -The program for the development of the C6416 board FLASH verify the success of reading and writing
SPWM
- 本文以高性能数字信号处理芯片TMS320F2812为核心,设计生成了基于不对称规则采样算法的SPWM波形,键盘输入参数设定调制波频率。本文首先分析了不对称规则算法的原理,接着设计了基于TMS320F2812芯片的软件设计流程,最后在数字示波器上显示了实验波形,验证了设计的有效性和可行性-In this paper, high-performance TMS320F2812 digital signal processing chip as the core, designed to genera
Matlab_simulinkzaijiaoliutiaosu
- 文章通过matlab仿真软件对永磁同步电机调速系统进行仿真分析，验证matlab对交流调速系统仿真的可靠性-Articles by matlab simulation software for permanent magnet synchronous motor control system is simulated to verify matlab simulation of AC speed control system reliability
SEEDVPM642_net
- DM642网络接口开发测试程序可验证以太网接口-DM642 network interface development test program can verify the Ethernet interface
OFDM-_matlab
- OFDM里常用到的模型，一个相对完整的OFDM通信系统的仿真设计，包括编码，调制，IFFT，上下变频，高斯信道建模，FFT，PAPR抑制，各种同步，解调和解码等模块，并统括系统性能的仿真验证了系统设计的可靠性。 -OFDM where commonly used to model a relatively complete OFDM communication system simulation design, including coding, modulation, IFFT, and
evm6424_i2c
- EVM6424上I2C接口编程示例，希望对需要的人有所帮助，经过CCS3.3验证-I2C interface programming examples, I hope to help people in need EVM6424 after CCS3.3 verify
evm6424_pci
- EVM6424上PCI接口编程示例，希望对需要的人有所帮助，经过CCS3.3验证-EVM6424 on PCI interface programming examples, I hope to help people in need, after CCS3.3 verify
evm6424_vlynq
- EVM6424上vlynq接口编程示例，希望对需要的人有所帮助，经过CCS3.3验证-EVM6424 on vlynq interface programming examples, I hope to help people in need, after CCS3.3 verify
fir_lp
- 1. To design FIR filters in MATLAB to achieve various types of frequency selectivity, e.g., lowpass, highpass，bandpass, etc 2. To verify the frequency response of the designed filters in MATLAB 3. To implement the designed FIR filters using C67
PE_PSpice_Files
- 给出了基于软件环境PE—PSpice的电路设计源码。同通过了顺利的测试运行-Introduce the software of electrical PE-pspice and verify the efffectness of the proposed code
bf51x_timer_interrupt
- 基于ADI的BF51x系列芯片，开发环境是VisualDSP++，验证TIMER中断功能。-Based on ADI' s BF51x series chips, the development environment is VisualDSP++, verify TIMER interrupt function.
MPEG4_DEC
- 基于ADI的BF561芯片，开发环境是VisualDSP++，实现实时的视频数据的播放；在ADSP-BF561存储区开辟空间，将MPEG-4标准码流装载到指定位置，依靠MPEG-4解码库进行视频解码，利用DMA和PPI实现图像的转换和视频的输出，观察液晶电视验证解码的图像的正确性。-Based on the ADI BF561 chip development environment is VisualDSP++, real-time video data playback ADSP-BF56