搜索资源列表
ASK.VHDL
- ASK调制VHDL程序及仿真 基于VHDL硬件描述语言,对基带信号进行ASK振幅调制-ASK modulation VHDL simulation based on the procedures and VHDL hardware descr iption language, the baseband signal amplitude modulation ASK
MASK.VHDL
- MASK调制VHDL程序与仿真 基于VHDL硬件描述语言,对基带信号进行MASK调制-MASK modulation VHDL simulation based on the procedures and VHDL hardware descr iption language, the baseband signal modulation MASK
19
- FPGA信号调制通信系统设计实例
BPSK
- 八相移键控调制的Verilog程序,给出了各个子模块的程序,实现了信号调制。-Eight-phase shift keying modulation of the Verilog program, each module is given the procedures, the signal modulation.
fpdpsk
- FSK/PSK信号调制器的VHDL程序,共分为分频器、m序列产生器、跳变检测、2:1数据选择器、正弦波信号产生器和DAC(数、模变换器)6部分-FSK/PSK signal modulator VHDL program is divided into divider, m sequence generator, transition detection, 2:1 data selector, the sine wave signal generator and DAC (number, mode
MPSK_VHDL
- --文件名:PL_MPSK --功能:基于VHDL硬件描述语言,对基带信号进行MPSK调制(这里M=4) -- File Name: PL_MPSK- features: VHDL hardware descr iption language based on the base-band signal MPSK modulation (here M = 4)
PSK_VHDL
- CPSK调制VHDL程序 --文件名:PL_CPSK --功能:基于VHDL硬件描述语言,对基带信号进行调制 -VHDL procedures CPSK modulation- the file name: PL_CPSK- features: VHDL hardware descr iption language based on the base-band signal modulation
VHDLcodeofMPSK
- 基于VHDL硬件描述语言,对基带信号进行MPSK调制(这里M=4)-VHDL code for MPSK
module_dem
- 用verilog编写的信号调制解调程序,包括ask,fsk,qpsk的fpga实现-Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation
pwm
- 运用FPGA 产生pwm脉宽调制信号的源代码-use fpga generate pwm signal
Study_on_Key_Technologies_of_n4-DQPSK_Modulation_a
- 本文首先研究可4一DQPsK调制解调系统中调制部分的基本原理和各个模块的设计方案,重点研究成形滤波器和直接数字频率合成器 (DireetoigitalFrequeneySynihesis,简称DDS),并针对各个关键模块算法进行matlab设计仿真,展示仿真结果。其次,研究调制解调系统解调部分的基本原理和各个模块的设计方案,重点研究差分解调,数字下变频和位同步算法,也针对其各个关键模块进行算法的Matlab设计仿真。然后用Matlab对整个系统进行理论仿真,得出结论。在此基础 上,采用超高速
signal
- 本例实现了一个FSK/PSK信号调制通信系统。通过FPGA平台上的按键控制,可分别产生FSK和PSK波形。-This example implements a FSK/PSK modulation communication systems. FPGA platforms through key control, FSK and PSK waveforms are generated.
AM
- AM信号的调制解调DSP算法,包括原理和应用-AM
fpga
- 基于FPGA的信号调制,可产生正弦波,并进行ASK调制和AM调制-FPGA-based signal modulation, can produce sine wave, and the ASK modulation and AM modulation
PWM
- 用于红外脉冲调制发射的程序,可将信号调制为38khz-hongwai fashe
dpsk_3rd
- 2DPSK调制与解调。学生实验使用,包括信号源模块、时钟源生成模块、信号调制模块,信号解调模块。 其中包含了边沿触发下的阻塞语句。 编译环境:Q2 11.0,编译语言:verilog,仿真软件:moelsim altera -2DPSK modulation and demodulation. The student experiments, including the source module clock source generation module, signal modu
FPGA__FSKaASKaCMI
- FPGA中关于信号调制的编程,里面包括ASK,FSK,CMI的编码器与译码器-Programming on the signal modulation in FPGA, which includes ASK, FSK, encoder and decoder of CMI
counterbasedDPWM_D
- 基于计数器的数字脉宽信号调制,用于电力电子设备pwm信号的产生-counter based digital puls width modulator
3M
- 在FPGA实验操作系统实现ASK,FSK,PSK的调制解调,基带信号由M序列发生器产生,经过AD模块在示波器上进行显示,精油DA模块在同一块实验板上进行解调操作,生成信号控制LED灯的亮灭,并与调制输出信号在示波器上同时展示,并进行对比。基带信号为3MHz。(In the FPGA operating system experiment implementation ASK, FSK, PSK modulation and demodulation of the baseband signal
AM调制解调
- 基于Artix-7 FPGA的AM调制解调代码,从AD读入信号后,进行AM调制,并解调输出(将代码分成两个工程就是AM的调制和解调),其中解调用到的数字滤波采用MATLAB设计(The AM modulation and demodulation code based on artix-7 FPGA, after reading the signal from AD, carries out AM modulation, and demodulates the output (the code