搜索资源列表
park
- 该程序是用VHDL制作的停车场停车位显示系统的源码-The program is produced with VHDL display system of parking spaces with source code
counter
- 停车场计数器的设计，分别计数进入停车场的车辆数目和离开停车场的车辆数目。- The design of the parking lot counter, into the parking lot were counting the number of vehicles and leaving the parking lot number of vehicles.
lywpass
- 停车场的计时计费自动显示电路的EDA的VHDL语言课程设计-The parking lot of the timing and charging automatically show circuit EDA VHDL language curriculum design
parking-counter-design
- 利用FPGA编程-------实现“停车场计数器设计”-Use of FPGA programming------- parking counter design
eda
- 基于VHDL实现的停车场停车位显示系统的设计，使用可编程逻辑芯片FPGA构成的停车位显示系统。-The design of car parking spaces display system based on FPGA is a very practical Subject, and close to our lives. This subject is the design of a times 8 parking spaces display based on the FPGA in VH
car_count
- car_enter，car_exit分别表示有车辆进入停车场和离开停车场。count1和count2是两个计数器，分别计数进入停车场的车辆数目和离开停车场的车辆数目。total=count1-count2, 表示停在停车场中的车辆数目。lot_full表示停车场已满，即total的大小等于预置的停车场最大停车数（例如32）。 lot_empty表示停车场车辆数目为零。-car_enter, car_exit vehicles entering the car park and leave the
Frequency-divider
- 利用Verilog设计的在停车场情况下的模拟的分频器和计数器的代码-The use of Verilog design in the parking lot in case of analog frequency divider and counter code
Timing-
- 利用verilog设计的停车场中的计数器计时器和计费器，完成智能管理效果-Use the counter timer and meter parking lot in the Verilog design, intelligent management
car_detect
- 停车场中车辆进出的检测与记录，可得出停车场的车数(The number of vehicles in the parking lot can be obtained by detecting and recording vehicle entry and exit.)