用verilog编写的分辨率提高的源代码 采用双线性插值-Written resolution with the verilog source code to improve the use of bilinear interpolation

针对视频数据的ZOOM IN/OUT模块， 插值算法为双线性或最邻近可选。-For video data ZOOM IN/OUT module, Interpolation algorithm for bilinear or nearest neighbor optional.

本代码将TW2867第一通道输出解复用以后进行BT.656格式的解析，然后将奇偶场合并为一帧存入DDR2，读取的时候使用双线性插值算法，将原始的720 x576的分辨率放大到800x600，然后在HDMI口输出。-This code will TW2867 first channel output demultiplexing after parsing BT.656 format, then the parity occasions and as a frame stored in DDR2,