宽字符ram的实现，在quartus平台实现-wide word ram，desinged by vhdl on quartus platform

把串行输入转换为并行输出或并行输入转换为串行输出的过程。能将串行接收到的’1’或’0’字符，每8位按顺序（先接收到的处于低位）排列为一个8位宽的字节输出。为保证数据传输中无误，同时发出一位奇校验位。-The serial input into parallel output to serial or parallel input output process. Capable of serial received a 1 or 0 character, every 8 sequentia