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asd
- FPGA数字移相器,编程环境为QUIRTE2,编程语言采用硬件描述语言vhdl-FPGA Digital Phase Shifter, programming environment for QUIRTE2. programming language used VHDL hardware descr iption language
yixiang
- 数字式移相信号发生器可以产生预置频率的正弦信号，也可产生预置相位差的两路同频正弦信号，并能显示预置频率或相位差值；-digital phase shifting generator can produce preset frequency sinusoidal signal, Preferences may also have phase difference with the way the two-frequency sinusoidal signal, and can show that
EXPT12_10_PHAS
- 数字移相信号发生器设计，采用quartus2平台-digital phase shifting generator design platform using quartus2
2FSK2psk
- ２ＦＳＫ２ＰＳＫ－二进制频移键控和相移键控信号发生器的源程序，是基于ＱＵＡＲＴＵＳ ＩＩ软件平台，使用ＶＨＤＬ语言-2FSK2PSK-binary frequency shift keying and phase shift keying signal generator source, QUARTUS II is based on the software platform, the use of VHDL
generate
- 实现低频率的移相信号发生器,才用DDS技术直接的合成
ddsyixiang
- dds数字移相信号发生器,功能齐全通过验证
5分频、移相VHDL程序
- 有两端VHDL程序，5分频的和分频移相的，希望大家用的上
SIG_1KHz
- 任意移相方波信号产生的VHDL代码。输入任意一个的相位偏移值就都能产生与参考方波有指定相位差的同频信号。-Square-wave signal of arbitrary phase shift generated by VHDL code. Enter any one of the phase offset can be generated on a designated phase with the reference square wave signal the same frequency
10512210247008
- 该数字式相位测量仪以单片机 (89c52) 为核心 , 通过高速计数器 CD4040 为计数器计算脉冲个数从 , 而达到计算相位的要求 , 通过 8279 驱动数码管显示正弦波的频率，不采用一般的模拟的振动器产生 , 而是采用单片机产生 , 从而实现了产生到显示的数字化 . 具有产生的频率精确 , 稳定的特点 . 相移部分采用一般的 RC 移相电路 , 节省了成本。-The digital phase-measuring instrument in order to microcontrolle
cotas
- Costas环是用来解调双边带抑制载波信号的,也是二相或四相移相键控信号解调的专用环路-Costas loop is used to double sideband suppressed carrier signal demodulation, and also two-phase or four phase shift keying signal demodulation of the special loop
phaseconrol
- 将10Khz的输入信号经过分频得到两路互补的方波信号，方波信号的频率由分频计数初值决定。然后将分频后的方波进行移相，从而得到另外两路方波信号，移相的大小也由计数器的的初值决定。-After the 10Khz frequency input signals are two complementary square wave signals, square wave signal frequency by a frequency count of initial decision. And the
dds
- 基于fpga的数字移相信号发生器，本文设计的数字相移信号发生器以直接数字频率合成（DDS）技术为核心，用现场可编程门阵列（FPGA）来实现频率和相位的预置和改变，并完成信号的频率和相位差显示。设计中采用的是直接数字频率合成（DDS）技术-Fpga-based Digital Signal Generator shift, the paper design of digital phase-shift signal generator for direct digital frequency sy
pwmyixiang
- 用VHDL编写的基于CPLD移相程序,开发环境是ISE9.1-CPLD with VHDL-based preparation phase procedures, the development environment is ISE9.1
DDS_PHASE
- 基于DDS BUILDER和VHDL写的数字移相信号源，经DA实测760Hz波形良好，手里没有高速DA，未能继续测试。仅供参考-DDS BUILDER and VHDL-based digital phase shift number written sources, 760Hz waveform measured by the DA good hands there is no high-speed DA, unable to continue testing. Reference
bysj
- 基于FPGA 的数控移相正弦信号发生器。-FPGA-based CNC phase-shifted sinusoidal signal generator.
03-NEC_2003_C
- 移相信号发生器（2003年C题），verilog源程序，-Phase shift generator Problem C (2003), Verilog source code,
phaseshift
- 移相器，任意角度偏移，包含test，经过测试-Phase shifters, any angle offset, contains test after test
ds
- Verilog语言，实现移相,输入方波TA，输出移相后T-Phase shifted square wave TA, the phase-shifted output TAA
phase_shift
- cpld/fpga实现移相功能 d触发器 数据选择器 单片机接口-phase_shift using cpld/fpga
FPGA_phase-shift
- 本文介绍基于FPGA和DDFS技术，应用Altera公司的FPGA开发工具DSP Builder设计数字移相信号发生器，该数字移相信号发生器的频率、相位、幅度均可预置，分辨率高，精确可调。-This paper introduces FPGA and DDFS technology based on FPGA development tools DSP Builder design of digital phase shift signal generator using Altera, fre