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Coding-style-and-guidelines-of-HDL
- 该资料对数字设计的编码风格、编码规范给出了详细介绍，并简介了VHDL、verilog的编码要点。-The information on the coding style of digital design, coding specification gives a detailed descr iption and profile of VHDL, verilog coding points.
VHDLcodingStyle
- VHDL设计编码规范 VHDL设计编码规范-VHDL Design Coding Design Coding VHDL specification norms
VHDLcoding
- 本文件时VHDL的各种编写规范，有助于开发者在平时养成好的编码习惯-This document, the various write VHDL specification, helps developers to develop good coding habits in peacetime
verilogcodingstyleforefficientdigitaldesign
- 编码风格的好坏对程序的健壮性有很大的影响，本文介绍了一些好的FPGA程序设计的风格，可以逐步模仿，最终形成规范的设计风格。-Coding style is good or bad the robustness of the process has a great influence, this article describes some of the good style of FPGA programming, can be gradually imitate and eventually
HDL_coding
- 介绍HDL编码规范的书，非常有用，可以让HDL编码更加规范。-HDL coding standard introduced the book, very useful, allowing more standard HDL code.
ENCODE_8B_10B
- 8B-10B编码，Verilog代码，通过编译，仿真，代码规范，清晰-8B-10B code, Verilog code, through the compilation, simulation, code specifications, clear
Verilog_coding_style
- verilog 编码规范，共包含3个PDF文档，供学习参考。-verilog coding style, include 3 seperate pdf files, just for studying or refrence.
Verilog_primer_V1.1
- Verilog HDL 语言的编码规范。详细介绍了verilog HDL编码的注意事项和基本规范。分为可综合部分，仿真专用部分以及nc-verilog仿真环境的建立。-Descr iption of Verilog HDL coding. containing synthesisable language, simulationable language and how to construct a proper environment.
Hua-Wei-ASICaVerilogaHardware
- 华为内部资料，整理分享给大家，内容如下： 1.Proverilog编码规范(草案) 2.华为_Verilog HDL电路设计指导书 3.华为内部培训资料linux 基础 4.华为同步电路设计规范 5.华为-硬件工程师 6.静态时序分析与逻辑设计- Huawei internal books, organize to share to you, reads as follows: 1.Proverilog coding standard (draft) 2.th
software-regular
- 新利软件规范，其对软件的研发过程和编码进行了一定的规范，可供大家学习参考-The new benefit software specifications, the software development process and coding specification, available for study reference
FSM
- 关于状态机的规范编码风格，有具体的verilog，vhdl实例-On the norms of the state machine coding style, specific Verilog, VHDL instance
coding
- 关于verilog编码风格的规范，从多个方面进行阐述-Regarding the specification of the Verilog coding style, described from multiple aspects