搜索资源列表
AltrFir32
- 借助于altera公司的IP核，在FPGA中使用dspbuilder实现32位低通FIR滤波器功能，-Altera With the company
32jie-vhdl-fir
- 32阶数字滤波器 没有时间来得及精简 不好意思了的说 呵呵 -32-order digital filter is not time enough time to streamline embarrassed to say Oh
32fir
- 32阶滤波器分布式算法实现的主程序代码,用EP2c35f84c8寄存器速率可达243.55MHz-32-order FIR digital filters: 32 filters distributed algorithm order the main program code, register with EP2c35f84c8 rate up to 243.55MHz
fir_comm
- 用QUARTUS软件，实现一个32阶的FIR数字滤波器-QUARTUS software used to implement a 32-order FIR digital filter
fir_da_test
- 用QUARTUS软件，用DA算法实现一个32阶的FIR滤波器-QUARTUS software used with the DA algorithm to achieve a 32-order FIR filter
fpga1244131245d
- 基于FPGA的FIR数字滤波器的设计与实现。滤波器设计参数可实现17阶和32阶线性相位FIR滤波器-FPGA-based FIR digital filter design and implementation. Filter design parameters can be achieved on 17 order and 32 order linear phase FIR filter
FIR_Filter
- verilog的32阶FIR低通滤波器描述-verilog 32-order FIR low-pass filter described
32-order-FIR-on-FPGA
- 基于FPGA的32阶FIR滤波器设计，研究了一种采用FPGA实现数字滤波器硬件电路方案；讨论了窗函数的选择、滤波器的结构以及系数量化问题-32 order FIR filter design based on FPGA, an FPGA implementation digital filter hardware circuit program discussed the choice of the window function, the structure of the filter co
32FIRVHDL
- 基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器，运行速度更快，占用内存更小，延迟更小。 -32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.
filter_VHDL
- FIR filter design using VHDL for 32 bit signed coefficientand 32 bit input and decimation is 4 and its working good
FirFilterChol
- 在FPGA利用vhdl实现了32阶FIR滤波器。已经我利用了在几个对象。-In FPGA using VHDL to achieve a 32 order FIR filter. I ve used in many objects.