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T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序，verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
Mars-SP3-U_SCH.rar
- 一块XC3S400 FPGA电路板的原理图，板子上有CY7C68013A作为USB接口,A XC3S400 FPGA circuit board schematics, board have CY7C68013A as USB interface
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
T3_USB_OUT
- cy7c68013向外部发送一个数据 ，发送至fpga，fpga的实例程序 -CY7C68013 to send an external data, sent to the fpga, fpga examples of procedures
FPGA_cy7c68013
- 本工程包括FPGA程序和CY7C68013固件程序。 上位机程序通过EZ-USB CONTROL PANNEL 来测试。-The works include the FPGA programs and CY7C68013 firmware. Host computer procedure EZ-USB CONTROL PANNEL to test.
1
- 基于USB接口的激光打标控制器设计，CY7C68013
usb_cy7c68013_connect_to_PC_Source_Code
- usb_cy7c68013与PC通信源码-usb cy7c68013 connect toPC-- Source Code
68013
- 使用68013的测试程序，包含68013固件程序-use of cy7c68013,data transfer from usb to pc.
USB
- USB CY7C68013 键盘发送 VHDL FPGA-USB CY7C68013 keypad VHDL FPGA
USB--LCD
- USB+LCD1602的现实 USB芯片CY7C68013 可以显示任意数-USB+ LCD1602 reality CY7C68013 USB chip can display any number of
fpgacy7c68013
- fpga 与usb 芯片cy7c68013的doc文档，用的是slavefifo方式-fpga with usb chip cy7c68013 the doc file, using slavefifo way
The-scheme-of-USB-interface
- 本文采用 USB 接口芯片+FPGA+自行设计的 429 总线驱动电路的方案， 完成了 USB-429 总线接口的设计。其中，USB 接口芯片采用 Cypress 公司的 从设备芯片 CY7C68013，实现了与计算机 USB 总线接口的数据通信。FPGA 代替 429 专用协议收发芯片，完成 429 总线数据的格式转换和协议处理，设 计更为灵活，成本更加低廉-The scheme of USB interface chip+ FPGA+ self-designed 429 bu
GPIF
- 实现USB高速传输,使用了GPIF模式，用的是CY7C68013-USB transmit in high speed
cy7c68013_Keyboard
- cy7c68013 USB2.0芯片 键盘控制设计源代码-CY7C68013 USB 2.0 chip keyboard to control the design of the source code
USB-COM-routines
- 使用CPLD实现的USB通讯与UART通讯相互转换，USB通讯速率可以达到20M 使用专用USB接口芯片cy7c68013芯片-Using CPLD implementation of USB communication and conversion between UART communication, USB communication speed can reach 20M using the dedicated USB interface chip chip cy7c68013
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
CY7C68013 Slave FIFO
- CY7C68013 Slave FIFO
13_usb_test
- fpga usb2.0 cy7c68013 黑金的板子(fpga usb2.0 cy7c68013)
ezusb_io_latest.tar
- CY7C68013实现FPGA控制的USB接口通信，已通过测试(CY7C68013 FPGA control to achieve the USB interface communication, has passed the test)
USB CY7C68013固件
- Keil 完成的固件。成功实现ARM与 FPGA的通讯(CY7C68013 IMX6+FPGA + KEIL)